diff --git a/src/arch/i386.ins b/src/arch/i386.ins
index 505efdd..03bce00 100644
--- a/src/arch/i386.ins
+++ b/src/arch/i386.ins
@@ -415,7 +415,40 @@
 { "fclex",	0x9bdbe2,	OP3F, AOT_NONE,   AOT_NONE,  AOT_NONE	},
 /* FCMOVcc								*/
 /* FIXME implement */
-/* FFREE	0xddc0 + i	2					*/
+/* FDIVR	0xd8 /7		1     m32real				*/
+/* FIXME implement */
+/* FDIVR	0xdc /7		1     m64real				*/
+/* FIXME implement */
+/* FDIVR	0xd8f8 +i	2     st(0)       st(i)			*/
+{ "fdivr",	0xd8f8,		OP2F, OP_st0,     OP_st0,    AOT_NONE	},
+{ "fdivr",	0xd8f9,		OP2F, OP_st0,     OP_st1,    AOT_NONE	},
+{ "fdivr",	0xd8fa,		OP2F, OP_st0,     OP_st2,    AOT_NONE	},
+{ "fdivr",	0xd8fb,		OP2F, OP_st0,     OP_st3,    AOT_NONE	},
+{ "fdivr",	0xd8fc,		OP2F, OP_st0,     OP_st4,    AOT_NONE	},
+{ "fdivr",	0xd8fd,		OP2F, OP_st0,     OP_st5,    AOT_NONE	},
+{ "fdivr",	0xd8fe,		OP2F, OP_st0,     OP_st6,    AOT_NONE	},
+{ "fdivr",	0xd8ff,		OP2F, OP_st0,     OP_st7,    AOT_NONE	},
+/* FDIVR	0xdcf0 +i	2     st(0)       st(i)			*/
+{ "fdivr",	0xdcf0,		OP2F, OP_st0,     OP_st0,    AOT_NONE	},
+{ "fdivr",	0xdcf1,		OP2F, OP_st1,     OP_st0,    AOT_NONE	},
+{ "fdivr",	0xdcf2,		OP2F, OP_st2,     OP_st0,    AOT_NONE	},
+{ "fdivr",	0xdcf3,		OP2F, OP_st3,     OP_st0,    AOT_NONE	},
+{ "fdivr",	0xdcf4,		OP2F, OP_st4,     OP_st0,    AOT_NONE	},
+{ "fdivr",	0xdcf5,		OP2F, OP_st5,     OP_st0,    AOT_NONE	},
+{ "fdivr",	0xdcf6,		OP2F, OP_st6,     OP_st0,    AOT_NONE	},
+{ "fdivr",	0xdcf7,		OP2F, OP_st7,     OP_st0,    AOT_NONE	},
+/* FDIVRP	0xdef1		2					*/
+{ "fdivrp",	0xdef1,		OP2F, AOT_NONE,   AOT_NONE,  AOT_NONE	},
+/* FDIVRP	0xdef0 +i	2     st(0)       st(i)			*/
+{ "fdivrp",	0xdef0,		OP2F, OP_st0,     OP_st0,    AOT_NONE	},
+{ "fdivrp",	0xdef1,		OP2F, OP_st1,     OP_st0,    AOT_NONE	},
+{ "fdivrp",	0xdef2,		OP2F, OP_st2,     OP_st0,    AOT_NONE	},
+{ "fdivrp",	0xdef3,		OP2F, OP_st3,     OP_st0,    AOT_NONE	},
+{ "fdivrp",	0xdef4,		OP2F, OP_st4,     OP_st0,    AOT_NONE	},
+{ "fdivrp",	0xdef5,		OP2F, OP_st5,     OP_st0,    AOT_NONE	},
+{ "fdivrp",	0xdef6,		OP2F, OP_st6,     OP_st0,    AOT_NONE	},
+{ "fdivrp",	0xdef7,		OP2F, OP_st7,     OP_st0,    AOT_NONE	},
+/* FFREE	0xddc0 +i	2     st(i)				*/
 { "ffree",	0xddc0,		OP2F, OP_st0,     AOT_NONE,  AOT_NONE	},
 { "ffree",	0xddc1,		OP2F, OP_st1,     AOT_NONE,  AOT_NONE	},
 { "ffree",	0xddc2,		OP2F, OP_st2,     AOT_NONE,  AOT_NONE	},
@@ -428,6 +461,10 @@
 /* FIXME implement */
 /* FIADD	0xde /0		1     m64int				*/
 /* FIXME implement */
+/* FIDIVR	0xda /7		1     m32int				*/
+/* FIXME implement */
+/* FIDIVR	0xde /7		1     m64int				*/
+/* FIXME implement */
 /* FILD		0xdf /0		1     m16int				*/
 /* FIXME implement */
 /* FILD		0xdb /0		1     m32int				*/
diff --git a/test/i386.S b/test/i386.S
index a6ee527..082ae88 100644
--- a/test/i386.S
+++ b/test/i386.S
@@ -142,6 +142,31 @@
 	faddp	%st7, %st0
 	fchs
 	fclex
+	fdivr	%st0, %st0
+	fdivr	%st0, %st1
+	fdivr	%st0, %st2
+	fdivr	%st0, %st3
+	fdivr	%st0, %st4
+	fdivr	%st0, %st5
+	fdivr	%st0, %st6
+	fdivr	%st0, %st7
+	fdivr	%st0, %st0
+	fdivr	%st1, %st0
+	fdivr	%st2, %st0
+	fdivr	%st3, %st0
+	fdivr	%st4, %st0
+	fdivr	%st5, %st0
+	fdivr	%st6, %st0
+	fdivr	%st7, %st0
+	fdivrp
+	fdivrp	%st0, %st0
+	fdivrp	%st1, %st0
+	fdivrp	%st2, %st0
+	fdivrp	%st3, %st0
+	fdivrp	%st4, %st0
+	fdivrp	%st5, %st0
+	fdivrp	%st6, %st0
+	fdivrp	%st7, %st0
 	ffree	%st0				/* dd c0		*/
 	ffree	%st1				/* dd c1		*/
 	ffree	%st2				/* dd c2		*/