Added the "movq" instruction
This commit is contained in:
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fd22e83f7d
commit
2e8a3235b8
@ -27,73 +27,88 @@
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/* instructions */
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/* instructions */
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/* EMMS 0x0f77 2 */
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/* EMMS 0x0f77 2 */
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{ "emms", 0x0f77, OP2F, AOT_NONE, AOT_NONE, AOT_NONE },
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{ "emms", 0x0f77, OP2F, AOT_NONE, AOT_NONE, AOT_NONE },
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/* PADDB 0x0ffc /r 2 mm mm/m64 */
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/* MOVQ 0x0f6f /r OP2F mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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#if 1 /* FIXME doesn't work properly */
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{ "paddb", 0x0ffc, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE},
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{ "movq", 0x0f6f, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE },
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{ "paddb", 0x0ffc, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE},
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{ "movq", 0x0f6f, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE },
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{ "paddb", 0x0ffc, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE},
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{ "movq", 0x0f6f, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE },
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{ "paddb", 0x0ffc, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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{ "movq", 0x0f6f, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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#endif
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/* PADDD 0x0ffd /r 2 mm mm/m64 */
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/* MOVQ 0x0f7f /r OP2F mm/m64 mm */
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{ "movq", 0x0f7f, OP2F, OP_RM64_D0_R,OP_R64_R, AOT_NONE },
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{ "movq", 0x0f7f, OP2F, OP_RM64_D8_R,OP_R64_R, AOT_NONE },
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{ "movq", 0x0f7f, OP2F, OP_RM64_DW_R,OP_R64_R, AOT_NONE },
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#if 1 /* FIXME doesn't work properly */
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#if 1 /* FIXME doesn't work properly */
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{ "paddd", 0x0ffe, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE},
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{ "movq", 0x0f7f, OP2F, OP_RM64_R64_R,OP_R64_R, AOT_NONE },
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{ "paddd", 0x0ffe, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE},
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{ "paddd", 0x0ffe, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE},
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{ "paddd", 0x0ffe, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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#endif
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/* PADDW 0x0ffd /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "paddw", 0x0ffd, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE},
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{ "paddw", 0x0ffd, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE},
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{ "paddw", 0x0ffd, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE},
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{ "paddw", 0x0ffd, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* PADDSB 0x0fec /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "paddsb", 0x0fec, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE},
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{ "paddsb", 0x0fec, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE},
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{ "paddsb", 0x0fec, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE},
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{ "paddsb", 0x0fec, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* PADDSW 0x0fed /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "paddsw", 0x0fed, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE},
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{ "paddsw", 0x0fed, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE},
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{ "paddsw", 0x0fed, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE},
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{ "paddsw", 0x0fed, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* PAND 0x0fdb /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "pand", 0x0fdb, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE},
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{ "pand", 0x0fdb, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE},
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{ "pand", 0x0fdb, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE},
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{ "pand", 0x0fdb, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* PANDN 0x0fdf /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "pandn", 0x0fdf, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE},
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{ "pandn", 0x0fdf, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE},
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{ "pandn", 0x0fdf, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE},
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{ "pandn", 0x0fdf, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* POR 0x0feb /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "por", 0x0feb, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE},
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{ "por", 0x0feb, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE},
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{ "por", 0x0feb, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE},
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{ "por", 0x0feb, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* PUNPCKLBW 0x0f60 /r 2 mm mm/m32 */
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/* FIXME implement */
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/* FIXME implement */
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/* PUNPCKLBD 0x0f61 /r 2 mm mm/m32 */
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/* PADDB 0x0ffc /r 2 mm mm/m64 */
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/* FIXME implement */
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/* PUNPCKLBQ 0x0f62 /r 2 mm mm/m32 */
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/* FIXME implement */
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/* PXOR 0x0fef /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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#if 1 /* FIXME doesn't work properly */
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{ "pxor", 0x0fef, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE},
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{ "paddb", 0x0ffc, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE },
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{ "pxor", 0x0fef, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE},
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{ "paddb", 0x0ffc, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE },
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{ "pxor", 0x0fef, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE},
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{ "paddb", 0x0ffc, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE },
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{ "pxor", 0x0fef, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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{ "paddb", 0x0ffc, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* PADDD 0x0ffd /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "paddd", 0x0ffe, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE },
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{ "paddd", 0x0ffe, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE },
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{ "paddd", 0x0ffe, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE },
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{ "paddd", 0x0ffe, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* PADDW 0x0ffd /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "paddw", 0x0ffd, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE },
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{ "paddw", 0x0ffd, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE },
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{ "paddw", 0x0ffd, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE },
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{ "paddw", 0x0ffd, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* PADDSB 0x0fec /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "paddsb", 0x0fec, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE },
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{ "paddsb", 0x0fec, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE },
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{ "paddsb", 0x0fec, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE },
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{ "paddsb", 0x0fec, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* PADDSW 0x0fed /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "paddsw", 0x0fed, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE },
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{ "paddsw", 0x0fed, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE },
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{ "paddsw", 0x0fed, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE },
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{ "paddsw", 0x0fed, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* PAND 0x0fdb /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "pand", 0x0fdb, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE },
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{ "pand", 0x0fdb, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE },
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{ "pand", 0x0fdb, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE },
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{ "pand", 0x0fdb, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* PANDN 0x0fdf /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "pandn", 0x0fdf, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE },
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{ "pandn", 0x0fdf, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE },
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{ "pandn", 0x0fdf, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE },
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{ "pandn", 0x0fdf, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* POR 0x0feb /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "por", 0x0feb, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE },
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{ "por", 0x0feb, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE },
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{ "por", 0x0feb, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE },
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{ "por", 0x0feb, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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/* PUNPCKLBW 0x0f60 /r 2 mm mm/m32 */
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/* FIXME implement */
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/* PUNPCKLBD 0x0f61 /r 2 mm mm/m32 */
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/* FIXME implement */
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/* PUNPCKLBQ 0x0f62 /r 2 mm mm/m32 */
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/* FIXME implement */
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/* PXOR 0x0fef /r 2 mm mm/m64 */
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#if 1 /* FIXME doesn't work properly */
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{ "pxor", 0x0fef, OP2F, OP_R64_R, OP_RM64_D0_R,AOT_NONE },
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{ "pxor", 0x0fef, OP2F, OP_R64_R, OP_RM64_D8_R,AOT_NONE },
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{ "pxor", 0x0fef, OP2F, OP_R64_R, OP_RM64_DW_R,AOT_NONE },
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{ "pxor", 0x0fef, OP2F, OP_R64_R, OP_RM64_R64_R,AOT_NONE},
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#endif
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#endif
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12
test/i686.S
12
test/i686.S
@ -1,6 +1,18 @@
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/* $Id$ */
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/* $Id$ */
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.text
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.text
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emms /* 0f 77 */
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emms /* 0f 77 */
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#if 1 /* FIXME doesn't work properly */
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movq %mm1, [%edx]
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movq %mm2, [%edx + $0x56]
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movq %mm3, [%edx + $0x789abc]
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movq %mm4, %mm5
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#endif
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movq [%edx], %mm2
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movq [%edx + $0x56], %mm3
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movq [%edx + $0x789abc], %mm4
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#if 1 /* FIXME doesn't work properly */
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movq %mm5, %mm6
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#endif
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#if 1 /* FIXME doesn't work properly */
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#if 1 /* FIXME doesn't work properly */
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paddb %mm1, [%edx]
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paddb %mm1, [%edx]
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paddb %mm2, [%edx + $0x56]
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paddb %mm2, [%edx + $0x56]
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