Added the "fadd" and "faddp" instructions
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377fe00791
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3a46ad6684
@ -65,6 +65,14 @@
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#define OP_ebp AO_REGISTER(AOF_IMPLICIT, 32, REG_ebp_id)
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#define OP_esi AO_REGISTER(AOF_IMPLICIT, 32, REG_esi_id)
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#define OP_edi AO_REGISTER(AOF_IMPLICIT, 32, REG_edi_id)
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#define OP_st0 AO_REGISTER(AOF_IMPLICIT, 32, REG_st0_id)
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#define OP_st1 AO_REGISTER(AOF_IMPLICIT, 32, REG_st1_id)
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#define OP_st2 AO_REGISTER(AOF_IMPLICIT, 32, REG_st2_id)
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#define OP_st3 AO_REGISTER(AOF_IMPLICIT, 32, REG_st3_id)
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#define OP_st4 AO_REGISTER(AOF_IMPLICIT, 32, REG_st4_id)
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#define OP_st5 AO_REGISTER(AOF_IMPLICIT, 32, REG_st5_id)
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#define OP_st6 AO_REGISTER(AOF_IMPLICIT, 32, REG_st6_id)
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#define OP_st7 AO_REGISTER(AOF_IMPLICIT, 32, REG_st7_id)
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/* mod r/m byte */
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#define AOF_I386_MODRM 0x2
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@ -358,5 +366,42 @@
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{ "f2xm1", 0xd9f0, OP2F, AOT_NONE, AOT_NONE, AOT_NONE },
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/* FABS 0xd9e1 2 */
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{ "fabs", 0xd9e1, OP2F, AOT_NONE, AOT_NONE, AOT_NONE },
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/* FADD 0xd8 /0 1 m32real */
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/* FIXME implement */
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/* FADD 0xdc /0 1 m64real */
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/* FIXME implement */
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/* FADD 0xd8c0 +i 2 st(0) st(i) */
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{ "fadd", 0xd8c0, OP2F, OP_st0, OP_st0, AOT_NONE },
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{ "fadd", 0xd8c1, OP2F, OP_st0, OP_st1, AOT_NONE },
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{ "fadd", 0xd8c2, OP2F, OP_st0, OP_st2, AOT_NONE },
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{ "fadd", 0xd8c3, OP2F, OP_st0, OP_st3, AOT_NONE },
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{ "fadd", 0xd8c4, OP2F, OP_st0, OP_st4, AOT_NONE },
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{ "fadd", 0xd8c5, OP2F, OP_st0, OP_st5, AOT_NONE },
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{ "fadd", 0xd8c6, OP2F, OP_st0, OP_st6, AOT_NONE },
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{ "fadd", 0xd8c7, OP2F, OP_st0, OP_st7, AOT_NONE },
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/* FADD 0xdcc0 +i 2 st(i) st(0) */
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{ "fadd", 0xdcc0, OP2F, OP_st0, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc1, OP2F, OP_st1, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc2, OP2F, OP_st2, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc3, OP2F, OP_st3, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc4, OP2F, OP_st4, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc5, OP2F, OP_st5, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc6, OP2F, OP_st6, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc7, OP2F, OP_st7, OP_st0, AOT_NONE },
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/* FADDP 0xdec1 2 */
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{ "faddp", 0xdec1, OP2F, AOT_NONE, AOT_NONE, AOT_NONE },
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/* FADDP 0xdec0 +i 2 st(i) st(0) */
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{ "faddp", 0xdec0, OP2F, OP_st0, OP_st0, AOT_NONE },
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{ "faddp", 0xdec1, OP2F, OP_st1, OP_st0, AOT_NONE },
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{ "faddp", 0xdec2, OP2F, OP_st2, OP_st0, AOT_NONE },
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{ "faddp", 0xdec3, OP2F, OP_st3, OP_st0, AOT_NONE },
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{ "faddp", 0xdec4, OP2F, OP_st4, OP_st0, AOT_NONE },
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{ "faddp", 0xdec5, OP2F, OP_st5, OP_st0, AOT_NONE },
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{ "faddp", 0xdec6, OP2F, OP_st6, OP_st0, AOT_NONE },
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{ "faddp", 0xdec7, OP2F, OP_st7, OP_st0, AOT_NONE },
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/* FIADD 0xda /0 1 m32int */
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/* FIXME implement */
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/* FIADD 0xde /0 1 m64int */
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/* FIXME implement */
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/* NOP 0x90 1 */
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{ "nop", 0x90, OP1F, AOT_NONE, AOT_NONE, AOT_NONE },
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25
test/i386.S
25
test/i386.S
@ -116,4 +116,29 @@
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enter $0xfacd, $0x42 /* c8 cd fa 42 */
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f2xm1
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fabs
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/* FADD */
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fadd %st0, %st0
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fadd %st0, %st1
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fadd %st0, %st2
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fadd %st0, %st3
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fadd %st0, %st4
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fadd %st0, %st5
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fadd %st0, %st6
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fadd %st0, %st7
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fadd %st1, %st0
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fadd %st2, %st0
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fadd %st3, %st0
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fadd %st4, %st0
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fadd %st5, %st0
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fadd %st6, %st0
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fadd %st7, %st0
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/* FADDP */
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faddp %st0, %st0
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faddp
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faddp %st2, %st0
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faddp %st3, %st0
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faddp %st4, %st0
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faddp %st5, %st0
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faddp %st6, %st0
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faddp %st7, %st0
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nop /* 0x90 */
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