Completed the instruction list for the Dalvik architecture (need be checked)
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aeab2aa627
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47efb56960
@ -175,3 +175,138 @@
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{ "move/16", 0x03, OP1F, OP_REGISTER, OP_REGISTER, AOT_NONE },
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{ "move/from16", 0x02, OP1F, OP_REGISTER, OP_REGISTER, AOT_NONE },
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{ "move-exception", 0x0d, OP1F, OP_REGISTER, AOT_NONE, AOT_NONE },
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#if 1 /* XXX really implement */
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{ "move-object", 0x07, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "move-object/16", 0x09, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "move-object/from16", 0x08, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "move-result", 0x0a, OP1F, OP_REGISTER, AOT_NONE, AOT_NONE },
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{ "move-result-object", 0x0c, OP1F, OP_REGISTER, AOT_NONE, AOT_NONE },
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{ "move-result-wide", 0x0b, OP1F, OP_REGISTER, AOT_NONE, AOT_NONE },
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#if 1 /* XXX really implement */
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{ "move-wide", 0x04, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "move-wide/16", 0x06, OP1F, OP_REGISTER, OP_REGISTER, AOT_NONE },
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{ "move-wide/from16", 0x05, OP1F, OP_REGISTER, OP_REGISTER, AOT_NONE },
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{ "mul-double", 0xad, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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{ "mul-double/2addr", 0xcd, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "mul-float", 0xa8, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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{ "mul-float/2addr", 0xc8, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "mul-int", 0x92, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "mul-int/2addr", 0xb2, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "mul-int/lit8", 0xda, OP1F, OP_REGISTER, OP_REGISTER, OP_U8 },
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{ "mul-int/lit16", 0xd2, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "mul-long", 0x9d, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "mul-long/2addr", 0xbd, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "neg-double", 0x80, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "neg-float", 0x7f, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "neg-int", 0x7b, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "neg-long", 0x7d, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "new-array", 0x23, OP1F, OP_v0, OP_REGISTER, OP_U16 },
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{ "new-instance", 0x22, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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#endif
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{ "nop", 0x0000, OP2F, AOT_NONE, AOT_NONE, AOT_NONE },
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#if 1 /* XXX really implement */
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{ "nop", 0x00, OP1F, OP_U8, AOT_NONE, AOT_NONE },
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{ "not-int", 0x7c, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "not-long", 0x7e, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "or-int", 0x96, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "or-int/2addr", 0xb6, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "or-int/lit8", 0xdb, OP1F, OP_REGISTER, OP_REGISTER, OP_U8 },
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{ "or-int/lit16", 0xd6, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "or-long", 0xa1, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "or-long/2addr", 0xc1, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "rem-double", 0xaf, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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{ "rem-double/2addr", 0xcf, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "rem-float", 0xaa, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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{ "rem-float/2addr", 0xca, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "rem-int", 0x94, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "rem-int/2addr", 0xb4, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "rem-int/lit8", 0xdc, OP1F, OP_REGISTER, OP_REGISTER, OP_U8 },
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{ "rem-int/lit16", 0xd4, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "rem-long", 0x9f, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "rem-long/2addr", 0xbf, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "return", 0x0f, OP1F, OP_REGISTER, AOT_NONE, AOT_NONE },
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{ "return-object", 0x11, OP1F, OP_REGISTER, AOT_NONE, AOT_NONE },
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{ "return-void", 0x0e00, OP2F, AOT_NONE, AOT_NONE, AOT_NONE },
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{ "return-void", 0x0e, OP1F, OP_U8, AOT_NONE, AOT_NONE },
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{ "return-wide", 0x10, OP1F, OP_REGISTER, AOT_NONE, AOT_NONE },
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{ "sget", 0x60, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sget-boolean", 0x63, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sget-byte", 0x64, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sget-char", 0x65, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sget-object", 0x62, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sget-short", 0x66, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sget-wide", 0x61, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "shl-int", 0x98, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "shl-int/2addr", 0xb8, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "shl-int/lit8", 0xe0, OP1F, OP_REGISTER, OP_REGISTER, OP_U8 },
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{ "shl-long", 0xa3, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "shl-long/2addr", 0xc3, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "shr-int", 0x99, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "shr-int/2addr", 0xb9, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "shr-int/lit8", 0xe1, OP1F, OP_REGISTER, OP_REGISTER, OP_U8 },
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{ "shr-long", 0xa4, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "shr-long/2addr", 0xc4, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "sparse-switch", 0x2c, OP1F, OP_REGISTER, OP_U32, AOT_NONE },
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#endif
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{ "sput", 0x67, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sput-boolean", 0x6a, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sput-byte", 0x6b, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sput-char", 0x6c, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sput-object", 0x69, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sput-short", 0x6d, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sput-wide", 0x68, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sub-double", 0xac, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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{ "sub-double/2addr", 0xcc, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "sub-float", 0xa7, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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{ "sub-float/2addr", 0xc7, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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{ "sub-int", 0x91, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "sub-int/2addr", 0xb1, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "sub-int/lit8", 0xd9, OP1F, OP_REGISTER, OP_REGISTER, OP_U8 },
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{ "sub-int/lit16", 0xd1, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "sub-long", 0x9c, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "sub-long/2addr", 0xbc, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "throw", 0x27, OP1F, OP_REGISTER, AOT_NONE, AOT_NONE },
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{ "ushr-int", 0x9a, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "ushr-int/2addr", 0xba, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "ushr-int/lit8", 0xe2, OP1F, OP_REGISTER, OP_REGISTER, OP_U8 },
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{ "ushr-long", 0xa5, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "ushr-long/2addr", 0xc5, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "xor-int", 0x97, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "xor-int/2addr", 0xb7, OP1F, OP_v0, OP_REGISTER, AOT_NONE },
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#endif
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{ "xor-int/lit8", 0xdf, OP1F, OP_REGISTER, OP_REGISTER, OP_U8 },
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{ "xor-int/lit16", 0xd7, OP1F, OP_REGISTER, OP_U16, AOT_NONE },
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{ "xor-long", 0xa2, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER },
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#if 1 /* XXX implement correctly */
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{ "xor-long/2addr", 0xc2, OP_v0, OP_REGISTER, AOT_NONE, AOT_NONE },
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#endif
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