DeforaOS/Asm
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Supporting more operands (not complete)

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This commit is contained in:
Pierre Pronchery 2011-09-28 02:52:20 +00:00
parent a3c0df10d5
commit 66e94a7717
1 changed files with 36 additions and 36 deletions
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72
src/arch/i386.ins
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@ -416,9 +416,9 @@
{ "decb", 0xfe, OP1F, OP_RM8_DW+1,AOT_NONE, AOT_NONE },
{ "dec", 0xfe, OP1F, OP_RM8_R8+1,AOT_NONE, AOT_NONE },
/* DEC 0xff /1 1 r/mW */
{ "dec", 0xff, OP1F, OP_RMW_D0+1,AOT_NONE, AOT_NONE },
{ "dec", 0xff, OP1F, OP_RMW_D8+1,AOT_NONE, AOT_NONE },
{ "dec", 0xff, OP1F, OP_RMW_DW+1,AOT_NONE, AOT_NONE },
{ "dec", 0xff, OP1F, AO_1(OP_RMW_D0+1) },
{ "dec", 0xff, OP1F, AO_1(OP_RMW_D8+1) },
{ "dec", 0xff, OP1F, AO_1(OP_RMW_DW+1) },
{ "dec", 0xff, OP1F, OP_RMW_RW+1,AOT_NONE, AOT_NONE },
/* DIV 0xf6 /6 1 r/m8 */
{ "divb", 0xf6, OP1F, OP_RM8_D0+6,AOT_NONE, AOT_NONE },
@ -426,9 +426,9 @@
{ "divb", 0xf6, OP1F, OP_RM8_DW+6,AOT_NONE, AOT_NONE },
{ "div", 0xf6, OP1F, OP_RM8_R8+6,AOT_NONE, AOT_NONE },
/* DIV 0xf7 /6 1 r/mW */
{ "div", 0xf7, OP1F, OP_RMW_D0+6,AOT_NONE, AOT_NONE },
{ "div", 0xf7, OP1F, OP_RMW_D8+6,AOT_NONE, AOT_NONE },
{ "div", 0xf7, OP1F, OP_RMW_DW+6,AOT_NONE, AOT_NONE },
{ "div", 0xf7, OP1F, AO_1(OP_RMW_D0+6) },
{ "div", 0xf7, OP1F, AO_1(OP_RMW_D8+6) },
{ "div", 0xf7, OP1F, AO_1(OP_RMW_DW+6) },
{ "div", 0xf7, OP1F, OP_RMW_RW+6,AOT_NONE, AOT_NONE },
/* ENTER 0xc8 iw 1 imm16 imm8 */
{ "enter", 0xc8, OP1F, OP_U16, OP_U8, AOT_NONE },
@ -715,9 +715,9 @@
{ "incb", 0xfe, OP1F, OP_RM8_DW+0,AOT_NONE, AOT_NONE },
{ "inc", 0xfe, OP1F, OP_RM8_R8+0,AOT_NONE, AOT_NONE },
/* INC 0xff /0 1 r/mW */
{ "inc", 0xff, OP1F, OP_RMW_D0+0,AOT_NONE, AOT_NONE },
{ "inc", 0xff, OP1F, OP_RMW_D8+0,AOT_NONE, AOT_NONE },
{ "inc", 0xff, OP1F, OP_RMW_DW+0,AOT_NONE, AOT_NONE },
{ "inc", 0xff, OP1F, AO_1(OP_RMW_D0+0) },
{ "inc", 0xff, OP1F, AO_1(OP_RMW_D8+0) },
{ "inc", 0xff, OP1F, AO_1(OP_RMW_DW+0) },
{ "inc", 0xff, OP1F, OP_RMW_RW+0,AOT_NONE, AOT_NONE },
/* INSB 0x6c 1 */
{ "insb", 0x6c, OP1F, AO_0() },
@ -787,14 +787,14 @@
/* JMP 0xe9 1 immW */
{ "jmp", 0xe9, OP1F, AO_1(OP_SW) },
/* JMP 0xff /4 1 r/mW */
{ "jmp", 0xff, OP1F, OP_RMW_D0+4,AOT_NONE, AOT_NONE },
{ "jmp", 0xff, OP1F, OP_RMW_D8+4,AOT_NONE, AOT_NONE },
{ "jmp", 0xff, OP1F, OP_RMW_DW+4,AOT_NONE, AOT_NONE },
{ "jmp", 0xff, OP1F, AO_1(OP_RMW_D0+4) },
{ "jmp", 0xff, OP1F, AO_1(OP_RMW_D8+4) },
{ "jmp", 0xff, OP1F, AO_1(OP_RMW_DW+4) },
{ "jmp", 0xff, OP1F, OP_RMW_RW+4,AOT_NONE, AOT_NONE },
/* JMP 0xff /5 1 m16int */
{ "jmp", 0xff, OP1F, OP_RMW_D0+5,AOT_NONE, AOT_NONE },
{ "jmp", 0xff, OP1F, OP_RMW_D8+5,AOT_NONE, AOT_NONE },
{ "jmp", 0xff, OP1F, OP_RMW_DW+5,AOT_NONE, AOT_NONE },
{ "jmp", 0xff, OP1F, AO_1(OP_RMW_D0+5) },
{ "jmp", 0xff, OP1F, AO_1(OP_RMW_D8+5) },
{ "jmp", 0xff, OP1F, AO_1(OP_RMW_DW+5) },
{ "jmp", 0xff, OP1F, OP_RMW_RW+5,AOT_NONE, AOT_NONE },
/* JNA 0x76 1 rel8 */
{ "jna", 0x76, OP1F, AO_1(OP_S8) },
@ -1006,9 +1006,9 @@
{ "mulb", 0xf6, OP1F, OP_RM8_DW+4,AOT_NONE, AOT_NONE },
{ "mul", 0xf6, OP1F, OP_RM8_R8+4,AOT_NONE, AOT_NONE },
/* MUL 0xf7 /4 1 r/mW */
{ "mul", 0xf7, OP1F, OP_RMW_D0+4,AOT_NONE, AOT_NONE },
{ "mul", 0xf7, OP1F, OP_RMW_D8+4,AOT_NONE, AOT_NONE },
{ "mul", 0xf7, OP1F, OP_RMW_DW+4,AOT_NONE, AOT_NONE },
{ "mul", 0xf7, OP1F, AO_1(OP_RMW_D0+4) },
{ "mul", 0xf7, OP1F, AO_1(OP_RMW_D8+4) },
{ "mul", 0xf7, OP1F, AO_1(OP_RMW_DW+4) },
{ "mul", 0xf7, OP1F, OP_RMW_RW+4,AOT_NONE, AOT_NONE },
/* NEG 0xf6 /3 1 r/m8 */
{ "negb", 0xf6, OP1F, OP_RM8_D0+3,AOT_NONE, AOT_NONE },
@ -1016,9 +1016,9 @@
{ "negb", 0xf6, OP1F, OP_RM8_DW+3,AOT_NONE, AOT_NONE },
{ "neg", 0xf6, OP1F, OP_RM8_R8+3,AOT_NONE, AOT_NONE },
/* NEG 0xf7 /3 1 r/mW */
{ "neg", 0xf7, OP1F, OP_RMW_D0+3,AOT_NONE, AOT_NONE },
{ "neg", 0xf7, OP1F, OP_RMW_D8+3,AOT_NONE, AOT_NONE },
{ "neg", 0xf7, OP1F, OP_RMW_DW+3,AOT_NONE, AOT_NONE },
{ "neg", 0xf7, OP1F, AO_1(OP_RMW_D0+3) },
{ "neg", 0xf7, OP1F, AO_1(OP_RMW_D8+3) },
{ "neg", 0xf7, OP1F, AO_1(OP_RMW_DW+3) },
{ "neg", 0xf7, OP1F, OP_RMW_RW+3,AOT_NONE, AOT_NONE },
/* NOP 0x90 1 */
{ "nop", 0x90, OP1F, AO_0() },
@ -1028,9 +1028,9 @@
{ "notb", 0xf6, OP1F, OP_RM8_DW+2,AOT_NONE, AOT_NONE },
{ "not", 0xf6, OP1F, OP_RM8_R8+2,AOT_NONE, AOT_NONE },
/* NOT 0xf7 /2 1 r/mW */
{ "not", 0xf7, OP1F, OP_RMW_D0+2,AOT_NONE, AOT_NONE },
{ "not", 0xf7, OP1F, OP_RMW_D8+2,AOT_NONE, AOT_NONE },
{ "not", 0xf7, OP1F, OP_RMW_DW+2,AOT_NONE, AOT_NONE },
{ "not", 0xf7, OP1F, AO_1(OP_RMW_D0+2) },
{ "not", 0xf7, OP1F, AO_1(OP_RMW_D8+2) },
{ "not", 0xf7, OP1F, AO_1(OP_RMW_DW+2) },
{ "not", 0xf7, OP1F, OP_RMW_RW+2,AOT_NONE, AOT_NONE },
/* OPSIZE 0x66 1 */
{ "opsize", 0x66, OP1F, AO_0() },
@ -1114,9 +1114,9 @@
{ "pop", 0x5e, OP1F, AO_1(OP_SI) },
{ "pop", 0x5f, OP1F, AO_1(OP_DI) },
/* POP 0x8f /0 1 rmW */
{ "pop", 0x8f, OP1F, OP_RMW_D0+0,AOT_NONE, AOT_NONE },
{ "pop", 0x8f, OP1F, OP_RMW_D8+0,AOT_NONE, AOT_NONE },
{ "pop", 0x8f, OP1F, OP_RMW_DW+0,AOT_NONE, AOT_NONE },
{ "pop", 0x8f, OP1F, AO_1(OP_RMW_D0+0) },
{ "pop", 0x8f, OP1F, AO_1(OP_RMW_D8+0) },
{ "pop", 0x8f, OP1F, AO_1(OP_RMW_DW+0) },
{ "pop", 0x8f, OP1F, OP_RMW_RW+0,AOT_NONE, AOT_NONE },
/* POPA 0x61 1 */
{ "popa", 0x61, OP1F, AO_0() },
@ -1152,9 +1152,9 @@
/* PUSH 0x68 1 immW */
{ "push", 0x68, OP1F, AO_1(OP_SW) },
/* PUSH 0xff /6 1 rmW */
{ "push", 0xff, OP1F, OP_RMW_D0+6,AOT_NONE, AOT_NONE },
{ "push", 0xff, OP1F, OP_RMW_D8+6,AOT_NONE, AOT_NONE },
{ "push", 0xff, OP1F, OP_RMW_DW+6,AOT_NONE, AOT_NONE },
{ "push", 0xff, OP1F, AO_1(OP_RMW_D0+6) },
{ "push", 0xff, OP1F, AO_1(OP_RMW_D8+6) },
{ "push", 0xff, OP1F, AO_1(OP_RMW_DW+6) },
{ "push", 0xff, OP1F, OP_RMW_RW+6,AOT_NONE, AOT_NONE },
/* PUSHA 0x60 1 */
{ "pusha", 0x60, OP1F, AO_0() },
@ -1278,13 +1278,13 @@
/* SETcc */
/* FIXME implement */
/* SGDT 0x0f01 /0 2 m */
{ "sgdt", 0x0f01, OP2F, OP_RMW_D0+0,AOT_NONE, AOT_NONE },
{ "sgdt", 0x0f01, OP2F, OP_RMW_D8+0,AOT_NONE, AOT_NONE },
{ "sgdt", 0x0f01, OP2F, OP_RMW_DW+0,AOT_NONE, AOT_NONE },
{ "sgdt", 0x0f01, OP2F, AO_1(OP_RMW_D0+0) },
{ "sgdt", 0x0f01, OP2F, AO_1(OP_RMW_D8+0) },
{ "sgdt", 0x0f01, OP2F, AO_1(OP_RMW_DW+0) },
/* SIDT 0x0f01 /1 2 m */
{ "sidt", 0x0f01, OP2F, OP_RMW_D0+1,AOT_NONE, AOT_NONE },
{ "sidt", 0x0f01, OP2F, OP_RMW_D8+1,AOT_NONE, AOT_NONE },
{ "sidt", 0x0f01, OP2F, OP_RMW_DW+1,AOT_NONE, AOT_NONE },
{ "sidt", 0x0f01, OP2F, AO_1(OP_RMW_D0+1) },
{ "sidt", 0x0f01, OP2F, AO_1(OP_RMW_D8+1) },
{ "sidt", 0x0f01, OP2F, AO_1(OP_RMW_DW+1) },
/* SHLD 0x0fa4 2 r/mW rW imm8 */
{ "shld", 0x0fa4, OP2F, OP_RMW_D0, OP_RW_R, OP_U8 },
{ "shld", 0x0fa4, OP2F, OP_RMW_D8, OP_RW_R, OP_U8 },