Supporting more operands (not complete)
This commit is contained in:
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30ec4b476f
commit
a3c0df10d5
@ -373,10 +373,10 @@
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{ "cmp", 0x3a, OP1F, AO_2(OP_R8_R, OP_RM8_DW) },
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{ "cmp", 0x3a, OP1F, AO_2(OP_R8_R, OP_RM8_R8) },
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/* CMP 0x3b /r 1 rW r/mW */
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{ "cmp", 0x3b, OP1F, OP_RW_R, OP_RMW_D0, AOT_NONE },
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{ "cmp", 0x3b, OP1F, OP_RW_R, OP_RMW_D8, AOT_NONE },
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{ "cmp", 0x3b, OP1F, OP_RW_R, OP_RMW_DW, AOT_NONE },
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{ "cmp", 0x3b, OP1F, OP_RW_R, OP_RMW_RW, AOT_NONE },
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{ "cmp", 0x3b, OP1F, AO_2(OP_RW_R, OP_RMW_D0) },
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{ "cmp", 0x3b, OP1F, AO_2(OP_RW_R, OP_RMW_D8) },
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{ "cmp", 0x3b, OP1F, AO_2(OP_RW_R, OP_RMW_DW) },
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{ "cmp", 0x3b, OP1F, AO_2(OP_RW_R, OP_RMW_RW) },
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/* CMP 0x3c 1 al imm8 */
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{ "cmp", 0x3c, OP1F, OP_al, OP_U8, AOT_NONE },
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/* CMP 0x3d 1 AX immW */
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@ -443,34 +443,34 @@
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/* FADD 0xdc /0 1 m64real */
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/* FIXME implement */
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/* FADD 0xd8c0 +i 2 st(0) st(i) */
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{ "fadd", 0xd8c0, OP2F, OP_st0, OP_st0, AOT_NONE },
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{ "fadd", 0xd8c1, OP2F, OP_st0, OP_st1, AOT_NONE },
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{ "fadd", 0xd8c2, OP2F, OP_st0, OP_st2, AOT_NONE },
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{ "fadd", 0xd8c3, OP2F, OP_st0, OP_st3, AOT_NONE },
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{ "fadd", 0xd8c4, OP2F, OP_st0, OP_st4, AOT_NONE },
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{ "fadd", 0xd8c5, OP2F, OP_st0, OP_st5, AOT_NONE },
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{ "fadd", 0xd8c6, OP2F, OP_st0, OP_st6, AOT_NONE },
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{ "fadd", 0xd8c7, OP2F, OP_st0, OP_st7, AOT_NONE },
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{ "fadd", 0xd8c0, OP2F, AO_2(OP_st0, OP_st0) },
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{ "fadd", 0xd8c1, OP2F, AO_2(OP_st0, OP_st1) },
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{ "fadd", 0xd8c2, OP2F, AO_2(OP_st0, OP_st2) },
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{ "fadd", 0xd8c3, OP2F, AO_2(OP_st0, OP_st3) },
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{ "fadd", 0xd8c4, OP2F, AO_2(OP_st0, OP_st4) },
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{ "fadd", 0xd8c5, OP2F, AO_2(OP_st0, OP_st5) },
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{ "fadd", 0xd8c6, OP2F, AO_2(OP_st0, OP_st6) },
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{ "fadd", 0xd8c7, OP2F, AO_2(OP_st0, OP_st7) },
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/* FADD 0xdcc0 +i 2 st(i) st(0) */
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{ "fadd", 0xdcc0, OP2F, OP_st0, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc1, OP2F, OP_st1, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc2, OP2F, OP_st2, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc3, OP2F, OP_st3, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc4, OP2F, OP_st4, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc5, OP2F, OP_st5, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc6, OP2F, OP_st6, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc7, OP2F, OP_st7, OP_st0, AOT_NONE },
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{ "fadd", 0xdcc0, OP2F, AO_2(OP_st0, OP_st0) },
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{ "fadd", 0xdcc1, OP2F, AO_2(OP_st1, OP_st0) },
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{ "fadd", 0xdcc2, OP2F, AO_2(OP_st2, OP_st0) },
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{ "fadd", 0xdcc3, OP2F, AO_2(OP_st3, OP_st0) },
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{ "fadd", 0xdcc4, OP2F, AO_2(OP_st4, OP_st0) },
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{ "fadd", 0xdcc5, OP2F, AO_2(OP_st5, OP_st0) },
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{ "fadd", 0xdcc6, OP2F, AO_2(OP_st6, OP_st0) },
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{ "fadd", 0xdcc7, OP2F, AO_2(OP_st7, OP_st0) },
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/* FADDP 0xdec1 2 */
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{ "faddp", 0xdec1, OP2F, AO_0() },
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/* FADDP 0xdec0 +i 2 st(i) st(0) */
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{ "faddp", 0xdec0, OP2F, OP_st0, OP_st0, AOT_NONE },
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{ "faddp", 0xdec1, OP2F, OP_st1, OP_st0, AOT_NONE },
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{ "faddp", 0xdec2, OP2F, OP_st2, OP_st0, AOT_NONE },
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{ "faddp", 0xdec3, OP2F, OP_st3, OP_st0, AOT_NONE },
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{ "faddp", 0xdec4, OP2F, OP_st4, OP_st0, AOT_NONE },
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{ "faddp", 0xdec5, OP2F, OP_st5, OP_st0, AOT_NONE },
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{ "faddp", 0xdec6, OP2F, OP_st6, OP_st0, AOT_NONE },
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{ "faddp", 0xdec7, OP2F, OP_st7, OP_st0, AOT_NONE },
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{ "faddp", 0xdec0, OP2F, AO_2(OP_st0, OP_st0) },
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{ "faddp", 0xdec1, OP2F, AO_2(OP_st1, OP_st0) },
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{ "faddp", 0xdec2, OP2F, AO_2(OP_st2, OP_st0) },
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{ "faddp", 0xdec3, OP2F, AO_2(OP_st3, OP_st0) },
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{ "faddp", 0xdec4, OP2F, AO_2(OP_st4, OP_st0) },
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{ "faddp", 0xdec5, OP2F, AO_2(OP_st5, OP_st0) },
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{ "faddp", 0xdec6, OP2F, AO_2(OP_st6, OP_st0) },
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{ "faddp", 0xdec7, OP2F, AO_2(OP_st7, OP_st0) },
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/* FBLD 0xdf /4 1 m80dec */
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/* FIXME implement */
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/* FBSTP 0xdf /6 1 m80bcd */
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@ -486,25 +486,25 @@
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/* FCOM 0xd8d1 2 */
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{ "fcom", 0xd8d1, OP2F, AO_0() },
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/* FCOM 0xd8d0 +i 2 st(i) */
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{ "fcom", 0xd8d0, OP2F, OP_st0, AOT_NONE, AOT_NONE },
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{ "fcom", 0xd8d1, OP2F, OP_st1, AOT_NONE, AOT_NONE },
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{ "fcom", 0xd8d2, OP2F, OP_st2, AOT_NONE, AOT_NONE },
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{ "fcom", 0xd8d3, OP2F, OP_st3, AOT_NONE, AOT_NONE },
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{ "fcom", 0xd8d4, OP2F, OP_st4, AOT_NONE, AOT_NONE },
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{ "fcom", 0xd8d5, OP2F, OP_st5, AOT_NONE, AOT_NONE },
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{ "fcom", 0xd8d6, OP2F, OP_st6, AOT_NONE, AOT_NONE },
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{ "fcom", 0xd8d7, OP2F, OP_st7, AOT_NONE, AOT_NONE },
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{ "fcom", 0xd8d0, OP2F, AO_1(OP_st0) },
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{ "fcom", 0xd8d1, OP2F, AO_1(OP_st1) },
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{ "fcom", 0xd8d2, OP2F, AO_1(OP_st2) },
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{ "fcom", 0xd8d3, OP2F, AO_1(OP_st3) },
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{ "fcom", 0xd8d4, OP2F, AO_1(OP_st4) },
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{ "fcom", 0xd8d5, OP2F, AO_1(OP_st5) },
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{ "fcom", 0xd8d6, OP2F, AO_1(OP_st6) },
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{ "fcom", 0xd8d7, OP2F, AO_1(OP_st7) },
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/* FCOMP 0xd8d9 2 */
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{ "fcomp", 0xd8d9, OP2F, AO_0() },
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/* FCOMP 0xd8d8 +i 2 st(i) */
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{ "fcomp", 0xd8d8, OP2F, OP_st0, AOT_NONE, AOT_NONE },
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{ "fcomp", 0xd8d9, OP2F, OP_st1, AOT_NONE, AOT_NONE },
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{ "fcomp", 0xd8da, OP2F, OP_st2, AOT_NONE, AOT_NONE },
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{ "fcomp", 0xd8db, OP2F, OP_st3, AOT_NONE, AOT_NONE },
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{ "fcomp", 0xd8dc, OP2F, OP_st4, AOT_NONE, AOT_NONE },
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{ "fcomp", 0xd8dd, OP2F, OP_st5, AOT_NONE, AOT_NONE },
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{ "fcomp", 0xd8de, OP2F, OP_st6, AOT_NONE, AOT_NONE },
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{ "fcomp", 0xd8df, OP2F, OP_st7, AOT_NONE, AOT_NONE },
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{ "fcomp", 0xd8d8, OP2F, AO_1(OP_st0) },
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{ "fcomp", 0xd8d9, OP2F, AO_1(OP_st1) },
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{ "fcomp", 0xd8da, OP2F, AO_1(OP_st2) },
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{ "fcomp", 0xd8db, OP2F, AO_1(OP_st3) },
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{ "fcomp", 0xd8dc, OP2F, AO_1(OP_st4) },
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{ "fcomp", 0xd8dd, OP2F, AO_1(OP_st5) },
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{ "fcomp", 0xd8de, OP2F, AO_1(OP_st6) },
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{ "fcomp", 0xd8df, OP2F, AO_1(OP_st7) },
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/* FCOMPP 0xded9 2 */
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{ "fcompp", 0xded9, OP2F, AO_0() },
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/* FCOS 0xd9ff 2 */
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@ -516,76 +516,76 @@
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/* FDIV 0xdc /6 1 m64real */
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/* FIXME implement */
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/* FDIV 0xd8f0 +i 2 st(0) st(i) */
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{ "fdiv", 0xd8f0, OP2F, OP_st0, OP_st0, AOT_NONE },
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{ "fdiv", 0xd8f1, OP2F, OP_st0, OP_st1, AOT_NONE },
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{ "fdiv", 0xd8f2, OP2F, OP_st0, OP_st2, AOT_NONE },
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{ "fdiv", 0xd8f3, OP2F, OP_st0, OP_st3, AOT_NONE },
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{ "fdiv", 0xd8f4, OP2F, OP_st0, OP_st4, AOT_NONE },
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{ "fdiv", 0xd8f5, OP2F, OP_st0, OP_st5, AOT_NONE },
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{ "fdiv", 0xd8f6, OP2F, OP_st0, OP_st6, AOT_NONE },
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{ "fdiv", 0xd8f7, OP2F, OP_st0, OP_st7, AOT_NONE },
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{ "fdiv", 0xd8f0, OP2F, AO_2(OP_st0, OP_st0) },
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{ "fdiv", 0xd8f1, OP2F, AO_2(OP_st0, OP_st1) },
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{ "fdiv", 0xd8f2, OP2F, AO_2(OP_st0, OP_st2) },
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{ "fdiv", 0xd8f3, OP2F, AO_2(OP_st0, OP_st3) },
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{ "fdiv", 0xd8f4, OP2F, AO_2(OP_st0, OP_st4) },
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{ "fdiv", 0xd8f5, OP2F, AO_2(OP_st0, OP_st5) },
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{ "fdiv", 0xd8f6, OP2F, AO_2(OP_st0, OP_st6) },
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{ "fdiv", 0xd8f7, OP2F, AO_2(OP_st0, OP_st7) },
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/* FDIV 0xdcf8 +i 2 st(0) st(i) */
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{ "fdiv", 0xdcf8, OP2F, OP_st0, OP_st0, AOT_NONE },
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{ "fdiv", 0xdcf9, OP2F, OP_st1, OP_st0, AOT_NONE },
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{ "fdiv", 0xdcfa, OP2F, OP_st2, OP_st0, AOT_NONE },
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{ "fdiv", 0xdcfb, OP2F, OP_st3, OP_st0, AOT_NONE },
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{ "fdiv", 0xdcfc, OP2F, OP_st4, OP_st0, AOT_NONE },
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{ "fdiv", 0xdcfd, OP2F, OP_st5, OP_st0, AOT_NONE },
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{ "fdiv", 0xdcfe, OP2F, OP_st6, OP_st0, AOT_NONE },
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{ "fdiv", 0xdcff, OP2F, OP_st7, OP_st0, AOT_NONE },
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{ "fdiv", 0xdcf8, OP2F, AO_2(OP_st0, OP_st0) },
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{ "fdiv", 0xdcf9, OP2F, AO_2(OP_st1, OP_st0) },
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{ "fdiv", 0xdcfa, OP2F, AO_2(OP_st2, OP_st0) },
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{ "fdiv", 0xdcfb, OP2F, AO_2(OP_st3, OP_st0) },
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{ "fdiv", 0xdcfc, OP2F, AO_2(OP_st4, OP_st0) },
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{ "fdiv", 0xdcfd, OP2F, AO_2(OP_st5, OP_st0) },
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{ "fdiv", 0xdcfe, OP2F, AO_2(OP_st6, OP_st0) },
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{ "fdiv", 0xdcff, OP2F, AO_2(OP_st7, OP_st0) },
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/* FDIVP 0xdef9 2 */
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{ "fdivp", 0xdef9, OP2F, AO_0() },
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/* FDIVP 0xdef8 +i 2 st(0) st(i) */
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{ "fdivp", 0xdef8, OP2F, OP_st0, OP_st0, AOT_NONE },
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{ "fdivp", 0xdef9, OP2F, OP_st1, OP_st0, AOT_NONE },
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{ "fdivp", 0xdefa, OP2F, OP_st2, OP_st0, AOT_NONE },
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{ "fdivp", 0xdefb, OP2F, OP_st3, OP_st0, AOT_NONE },
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{ "fdivp", 0xdefc, OP2F, OP_st4, OP_st0, AOT_NONE },
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{ "fdivp", 0xdefd, OP2F, OP_st5, OP_st0, AOT_NONE },
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{ "fdivp", 0xdefe, OP2F, OP_st6, OP_st0, AOT_NONE },
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{ "fdivp", 0xdeff, OP2F, OP_st7, OP_st0, AOT_NONE },
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{ "fdivp", 0xdef8, OP2F, AO_2(OP_st0, OP_st0) },
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{ "fdivp", 0xdef9, OP2F, AO_2(OP_st1, OP_st0) },
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{ "fdivp", 0xdefa, OP2F, AO_2(OP_st2, OP_st0) },
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{ "fdivp", 0xdefb, OP2F, AO_2(OP_st3, OP_st0) },
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{ "fdivp", 0xdefc, OP2F, AO_2(OP_st4, OP_st0) },
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{ "fdivp", 0xdefd, OP2F, AO_2(OP_st5, OP_st0) },
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{ "fdivp", 0xdefe, OP2F, AO_2(OP_st6, OP_st0) },
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{ "fdivp", 0xdeff, OP2F, AO_2(OP_st7, OP_st0) },
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/* FDIVR 0xd8 /7 1 m32real */
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/* FIXME implement */
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/* FDIVR 0xdc /7 1 m64real */
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/* FIXME implement */
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/* FDIVR 0xd8f8 +i 2 st(0) st(i) */
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{ "fdivr", 0xd8f8, OP2F, OP_st0, OP_st0, AOT_NONE },
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{ "fdivr", 0xd8f9, OP2F, OP_st0, OP_st1, AOT_NONE },
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{ "fdivr", 0xd8fa, OP2F, OP_st0, OP_st2, AOT_NONE },
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{ "fdivr", 0xd8fb, OP2F, OP_st0, OP_st3, AOT_NONE },
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{ "fdivr", 0xd8fc, OP2F, OP_st0, OP_st4, AOT_NONE },
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{ "fdivr", 0xd8fd, OP2F, OP_st0, OP_st5, AOT_NONE },
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{ "fdivr", 0xd8fe, OP2F, OP_st0, OP_st6, AOT_NONE },
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{ "fdivr", 0xd8ff, OP2F, OP_st0, OP_st7, AOT_NONE },
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{ "fdivr", 0xd8f8, OP2F, AO_2(OP_st0, OP_st0) },
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{ "fdivr", 0xd8f9, OP2F, AO_2(OP_st0, OP_st1) },
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{ "fdivr", 0xd8fa, OP2F, AO_2(OP_st0, OP_st2) },
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{ "fdivr", 0xd8fb, OP2F, AO_2(OP_st0, OP_st3) },
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{ "fdivr", 0xd8fc, OP2F, AO_2(OP_st0, OP_st4) },
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{ "fdivr", 0xd8fd, OP2F, AO_2(OP_st0, OP_st5) },
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{ "fdivr", 0xd8fe, OP2F, AO_2(OP_st0, OP_st6) },
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{ "fdivr", 0xd8ff, OP2F, AO_2(OP_st0, OP_st7) },
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/* FDIVR 0xdcf0 +i 2 st(0) st(i) */
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{ "fdivr", 0xdcf0, OP2F, OP_st0, OP_st0, AOT_NONE },
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{ "fdivr", 0xdcf1, OP2F, OP_st1, OP_st0, AOT_NONE },
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{ "fdivr", 0xdcf2, OP2F, OP_st2, OP_st0, AOT_NONE },
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{ "fdivr", 0xdcf3, OP2F, OP_st3, OP_st0, AOT_NONE },
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{ "fdivr", 0xdcf4, OP2F, OP_st4, OP_st0, AOT_NONE },
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{ "fdivr", 0xdcf5, OP2F, OP_st5, OP_st0, AOT_NONE },
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{ "fdivr", 0xdcf6, OP2F, OP_st6, OP_st0, AOT_NONE },
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{ "fdivr", 0xdcf7, OP2F, OP_st7, OP_st0, AOT_NONE },
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{ "fdivr", 0xdcf0, OP2F, AO_2(OP_st0, OP_st0) },
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{ "fdivr", 0xdcf1, OP2F, AO_2(OP_st1, OP_st0) },
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{ "fdivr", 0xdcf2, OP2F, AO_2(OP_st2, OP_st0) },
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{ "fdivr", 0xdcf3, OP2F, AO_2(OP_st3, OP_st0) },
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{ "fdivr", 0xdcf4, OP2F, AO_2(OP_st4, OP_st0) },
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{ "fdivr", 0xdcf5, OP2F, AO_2(OP_st5, OP_st0) },
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{ "fdivr", 0xdcf6, OP2F, AO_2(OP_st6, OP_st0) },
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{ "fdivr", 0xdcf7, OP2F, AO_2(OP_st7, OP_st0) },
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/* FDIVRP 0xdef1 2 */
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{ "fdivrp", 0xdef1, OP2F, AO_0() },
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/* FDIVRP 0xdef0 +i 2 st(0) st(i) */
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{ "fdivrp", 0xdef0, OP2F, OP_st0, OP_st0, AOT_NONE },
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{ "fdivrp", 0xdef1, OP2F, OP_st1, OP_st0, AOT_NONE },
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{ "fdivrp", 0xdef2, OP2F, OP_st2, OP_st0, AOT_NONE },
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{ "fdivrp", 0xdef3, OP2F, OP_st3, OP_st0, AOT_NONE },
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{ "fdivrp", 0xdef4, OP2F, OP_st4, OP_st0, AOT_NONE },
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{ "fdivrp", 0xdef5, OP2F, OP_st5, OP_st0, AOT_NONE },
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{ "fdivrp", 0xdef6, OP2F, OP_st6, OP_st0, AOT_NONE },
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{ "fdivrp", 0xdef7, OP2F, OP_st7, OP_st0, AOT_NONE },
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{ "fdivrp", 0xdef0, OP2F, AO_2(OP_st0, OP_st0) },
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{ "fdivrp", 0xdef1, OP2F, AO_2(OP_st1, OP_st0) },
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{ "fdivrp", 0xdef2, OP2F, AO_2(OP_st2, OP_st0) },
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{ "fdivrp", 0xdef3, OP2F, AO_2(OP_st3, OP_st0) },
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{ "fdivrp", 0xdef4, OP2F, AO_2(OP_st4, OP_st0) },
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{ "fdivrp", 0xdef5, OP2F, AO_2(OP_st5, OP_st0) },
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{ "fdivrp", 0xdef6, OP2F, AO_2(OP_st6, OP_st0) },
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{ "fdivrp", 0xdef7, OP2F, AO_2(OP_st7, OP_st0) },
|
||||
/* FFREE 0xddc0 +i 2 st(i) */
|
||||
{ "ffree", 0xddc0, OP2F, OP_st0, AOT_NONE, AOT_NONE },
|
||||
{ "ffree", 0xddc1, OP2F, OP_st1, AOT_NONE, AOT_NONE },
|
||||
{ "ffree", 0xddc2, OP2F, OP_st2, AOT_NONE, AOT_NONE },
|
||||
{ "ffree", 0xddc3, OP2F, OP_st3, AOT_NONE, AOT_NONE },
|
||||
{ "ffree", 0xddc4, OP2F, OP_st4, AOT_NONE, AOT_NONE },
|
||||
{ "ffree", 0xddc5, OP2F, OP_st5, AOT_NONE, AOT_NONE },
|
||||
{ "ffree", 0xddc6, OP2F, OP_st6, AOT_NONE, AOT_NONE },
|
||||
{ "ffree", 0xddc7, OP2F, OP_st7, AOT_NONE, AOT_NONE },
|
||||
{ "ffree", 0xddc0, OP2F, AO_1(OP_st0) },
|
||||
{ "ffree", 0xddc1, OP2F, AO_1(OP_st1) },
|
||||
{ "ffree", 0xddc2, OP2F, AO_1(OP_st2) },
|
||||
{ "ffree", 0xddc3, OP2F, AO_1(OP_st3) },
|
||||
{ "ffree", 0xddc4, OP2F, AO_1(OP_st4) },
|
||||
{ "ffree", 0xddc5, OP2F, AO_1(OP_st5) },
|
||||
{ "ffree", 0xddc6, OP2F, AO_1(OP_st6) },
|
||||
{ "ffree", 0xddc7, OP2F, AO_1(OP_st7) },
|
||||
/* FIADD 0xda /0 1 m32int */
|
||||
/* FIXME implement */
|
||||
/* FIADD 0xde /0 1 m64int */
|
||||
@ -621,14 +621,14 @@
|
||||
/* FLD 0xdb /5 1 m80real */
|
||||
/* FIXME implement */
|
||||
/* FLD 0xd9c0 +i 2 st(i) */
|
||||
{ "fld", 0xd9c0, OP2F, OP_st0, AOT_NONE, AOT_NONE },
|
||||
{ "fld", 0xd9c1, OP2F, OP_st1, AOT_NONE, AOT_NONE },
|
||||
{ "fld", 0xd9c2, OP2F, OP_st2, AOT_NONE, AOT_NONE },
|
||||
{ "fld", 0xd9c3, OP2F, OP_st3, AOT_NONE, AOT_NONE },
|
||||
{ "fld", 0xd9c4, OP2F, OP_st4, AOT_NONE, AOT_NONE },
|
||||
{ "fld", 0xd9c5, OP2F, OP_st5, AOT_NONE, AOT_NONE },
|
||||
{ "fld", 0xd9c6, OP2F, OP_st6, AOT_NONE, AOT_NONE },
|
||||
{ "fld", 0xd9c7, OP2F, OP_st7, AOT_NONE, AOT_NONE },
|
||||
{ "fld", 0xd9c0, OP2F, AO_1(OP_st0) },
|
||||
{ "fld", 0xd9c1, OP2F, AO_1(OP_st1) },
|
||||
{ "fld", 0xd9c2, OP2F, AO_1(OP_st2) },
|
||||
{ "fld", 0xd9c3, OP2F, AO_1(OP_st3) },
|
||||
{ "fld", 0xd9c4, OP2F, AO_1(OP_st4) },
|
||||
{ "fld", 0xd9c5, OP2F, AO_1(OP_st5) },
|
||||
{ "fld", 0xd9c6, OP2F, AO_1(OP_st6) },
|
||||
{ "fld", 0xd9c7, OP2F, AO_1(OP_st7) },
|
||||
/* FLD1 0xd9e8 2 */
|
||||
{ "fld1", 0xd9e8, OP2F, AO_0() },
|
||||
/* FLDL2E 0xd9ea 2 */
|
||||
@ -644,34 +644,34 @@
|
||||
/* FLDZ 0xd9ee 2 */
|
||||
{ "fldz", 0xd9ee, OP2F, AO_0() },
|
||||
/* FMUL 0xd8c8 +i 2 st(0) st(i) */
|
||||
{ "fmul", 0xd8c8, OP2F, OP_st0, OP_st0, AOT_NONE },
|
||||
{ "fmul", 0xd8c9, OP2F, OP_st0, OP_st1, AOT_NONE },
|
||||
{ "fmul", 0xd8ca, OP2F, OP_st0, OP_st2, AOT_NONE },
|
||||
{ "fmul", 0xd8cb, OP2F, OP_st0, OP_st3, AOT_NONE },
|
||||
{ "fmul", 0xd8cc, OP2F, OP_st0, OP_st4, AOT_NONE },
|
||||
{ "fmul", 0xd8cd, OP2F, OP_st0, OP_st5, AOT_NONE },
|
||||
{ "fmul", 0xd8ce, OP2F, OP_st0, OP_st6, AOT_NONE },
|
||||
{ "fmul", 0xd8cf, OP2F, OP_st0, OP_st7, AOT_NONE },
|
||||
{ "fmul", 0xd8c8, OP2F, AO_2(OP_st0, OP_st0) },
|
||||
{ "fmul", 0xd8c9, OP2F, AO_2(OP_st0, OP_st1) },
|
||||
{ "fmul", 0xd8ca, OP2F, AO_2(OP_st0, OP_st2) },
|
||||
{ "fmul", 0xd8cb, OP2F, AO_2(OP_st0, OP_st3) },
|
||||
{ "fmul", 0xd8cc, OP2F, AO_2(OP_st0, OP_st4) },
|
||||
{ "fmul", 0xd8cd, OP2F, AO_2(OP_st0, OP_st5) },
|
||||
{ "fmul", 0xd8ce, OP2F, AO_2(OP_st0, OP_st6) },
|
||||
{ "fmul", 0xd8cf, OP2F, AO_2(OP_st0, OP_st7) },
|
||||
/* FMUL 0xdcc8 +i 2 st(i) st(0) */
|
||||
{ "fmul", 0xdcc8, OP2F, OP_st0, OP_st0, AOT_NONE },
|
||||
{ "fmul", 0xdcc9, OP2F, OP_st1, OP_st0, AOT_NONE },
|
||||
{ "fmul", 0xdcca, OP2F, OP_st2, OP_st0, AOT_NONE },
|
||||
{ "fmul", 0xdccb, OP2F, OP_st3, OP_st0, AOT_NONE },
|
||||
{ "fmul", 0xdccc, OP2F, OP_st4, OP_st0, AOT_NONE },
|
||||
{ "fmul", 0xdccd, OP2F, OP_st5, OP_st0, AOT_NONE },
|
||||
{ "fmul", 0xdcce, OP2F, OP_st6, OP_st0, AOT_NONE },
|
||||
{ "fmul", 0xdccf, OP2F, OP_st7, OP_st0, AOT_NONE },
|
||||
{ "fmul", 0xdcc8, OP2F, AO_2(OP_st0, OP_st0) },
|
||||
{ "fmul", 0xdcc9, OP2F, AO_2(OP_st1, OP_st0) },
|
||||
{ "fmul", 0xdcca, OP2F, AO_2(OP_st2, OP_st0) },
|
||||
{ "fmul", 0xdccb, OP2F, AO_2(OP_st3, OP_st0) },
|
||||
{ "fmul", 0xdccc, OP2F, AO_2(OP_st4, OP_st0) },
|
||||
{ "fmul", 0xdccd, OP2F, AO_2(OP_st5, OP_st0) },
|
||||
{ "fmul", 0xdcce, OP2F, AO_2(OP_st6, OP_st0) },
|
||||
{ "fmul", 0xdccf, OP2F, AO_2(OP_st7, OP_st0) },
|
||||
/* FMULP 0xdec9 2 */
|
||||
{ "fmulp", 0xdec9, OP2F, AO_0() },
|
||||
/* FMULP 0xdec8 +i 2 st(i) st(0) */
|
||||
{ "fmulp", 0xdec8, OP2F, OP_st0, OP_st0, AOT_NONE },
|
||||
{ "fmulp", 0xdec9, OP2F, OP_st1, OP_st0, AOT_NONE },
|
||||
{ "fmulp", 0xdeca, OP2F, OP_st2, OP_st0, AOT_NONE },
|
||||
{ "fmulp", 0xdecb, OP2F, OP_st3, OP_st0, AOT_NONE },
|
||||
{ "fmulp", 0xdecc, OP2F, OP_st4, OP_st0, AOT_NONE },
|
||||
{ "fmulp", 0xdecd, OP2F, OP_st5, OP_st0, AOT_NONE },
|
||||
{ "fmulp", 0xdece, OP2F, OP_st6, OP_st0, AOT_NONE },
|
||||
{ "fmulp", 0xdecf, OP2F, OP_st7, OP_st0, AOT_NONE },
|
||||
{ "fmulp", 0xdec8, OP2F, AO_2(OP_st0, OP_st0) },
|
||||
{ "fmulp", 0xdec9, OP2F, AO_2(OP_st1, OP_st0) },
|
||||
{ "fmulp", 0xdeca, OP2F, AO_2(OP_st2, OP_st0) },
|
||||
{ "fmulp", 0xdecb, OP2F, AO_2(OP_st3, OP_st0) },
|
||||
{ "fmulp", 0xdecc, OP2F, AO_2(OP_st4, OP_st0) },
|
||||
{ "fmulp", 0xdecd, OP2F, AO_2(OP_st5, OP_st0) },
|
||||
{ "fmulp", 0xdece, OP2F, AO_2(OP_st6, OP_st0) },
|
||||
{ "fmulp", 0xdecf, OP2F, AO_2(OP_st7, OP_st0) },
|
||||
/* FNCLEX 0xdbe2 2 */
|
||||
{ "fnclex", 0xdbe2, OP2F, AO_0() },
|
||||
/* FNINIT 0xdbe3 2 */
|
||||
@ -876,10 +876,10 @@
|
||||
{ "lahf", 0x9f, OP1F, AO_0() },
|
||||
#if 1 /* FIXME probably doesn't work at the moment */
|
||||
/* LEA 0x8d 1 rW m */
|
||||
{ "lea", 0x8d, OP1F, OP_RW_R, OP_RMW_D0, AOT_NONE },
|
||||
{ "lea", 0x8d, OP1F, OP_RW_R, OP_RMW_D8, AOT_NONE },
|
||||
{ "lea", 0x8d, OP1F, OP_RW_R, OP_RMW_DW, AOT_NONE },
|
||||
{ "lea", 0x8d, OP1F, OP_RW_R, OP_RMW_RW, AOT_NONE },
|
||||
{ "lea", 0x8d, OP1F, AO_2(OP_RW_R, OP_RMW_D0) },
|
||||
{ "lea", 0x8d, OP1F, AO_2(OP_RW_R, OP_RMW_D8) },
|
||||
{ "lea", 0x8d, OP1F, AO_2(OP_RW_R, OP_RMW_DW) },
|
||||
{ "lea", 0x8d, OP1F, AO_2(OP_RW_R, OP_RMW_RW) },
|
||||
#endif
|
||||
/* LEAVE 0xc9 1 */
|
||||
{ "leave", 0xc9, OP1F, AO_0() },
|
||||
@ -920,10 +920,10 @@
|
||||
{ "mov", 0x8a, OP1F, AO_2(OP_R8_R, OP_RM8_DW) },
|
||||
{ "mov", 0x8a, OP1F, AO_2(OP_R8_R, OP_RM8_R8) },
|
||||
/* MOV 0x8b /r 1 rW r/mW */
|
||||
{ "mov", 0x8b, OP1F, OP_RW_R, OP_RMW_D0, AOT_NONE },
|
||||
{ "mov", 0x8b, OP1F, OP_RW_R, OP_RMW_D8, AOT_NONE },
|
||||
{ "mov", 0x8b, OP1F, OP_RW_R, OP_RMW_DW, AOT_NONE },
|
||||
{ "mov", 0x8b, OP1F, OP_RW_R, OP_RMW_RW, AOT_NONE },
|
||||
{ "mov", 0x8b, OP1F, AO_2(OP_RW_R, OP_RMW_D0) },
|
||||
{ "mov", 0x8b, OP1F, AO_2(OP_RW_R, OP_RMW_D8) },
|
||||
{ "mov", 0x8b, OP1F, AO_2(OP_RW_R, OP_RMW_DW) },
|
||||
{ "mov", 0x8b, OP1F, AO_2(OP_RW_R, OP_RMW_RW) },
|
||||
#if 1 /* FIXME doesn't work properly */
|
||||
/* MOV 0x8e /r 1 Sreg r/m16 */
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user