diff --git a/Makefile b/Makefile index c5b2cad..eaf0001 100644 --- a/Makefile +++ b/Makefile @@ -49,6 +49,7 @@ dist: $(PACKAGE)-$(VERSION)/src/parser.h \ $(PACKAGE)-$(VERSION)/src/token.h \ $(PACKAGE)-$(VERSION)/src/project.conf \ + $(PACKAGE)-$(VERSION)/src/arch/dalvik.c \ $(PACKAGE)-$(VERSION)/src/arch/i386.c \ $(PACKAGE)-$(VERSION)/src/arch/i386_real.c \ $(PACKAGE)-$(VERSION)/src/arch/i486.c \ @@ -59,6 +60,8 @@ dist: $(PACKAGE)-$(VERSION)/src/arch/sparc64.c \ $(PACKAGE)-$(VERSION)/src/arch/Makefile \ $(PACKAGE)-$(VERSION)/src/arch/common.ins \ + $(PACKAGE)-$(VERSION)/src/arch/dalvik.ins \ + $(PACKAGE)-$(VERSION)/src/arch/dalvik.reg \ $(PACKAGE)-$(VERSION)/src/arch/i386.h \ $(PACKAGE)-$(VERSION)/src/arch/i386.ins \ $(PACKAGE)-$(VERSION)/src/arch/i386.reg \ diff --git a/src/arch/Makefile b/src/arch/Makefile index 2e80325..86fdb7d 100644 --- a/src/arch/Makefile +++ b/src/arch/Makefile @@ -1,4 +1,4 @@ -TARGETS = i386.so i386_real.so i486.so i586.so i686.so java.so sparc.so sparc64.so +TARGETS = dalvik.so i386.so i386_real.so i486.so i586.so i686.so java.so sparc.so sparc64.so PREFIX = /usr/local DESTDIR = LIBDIR = $(PREFIX)/lib @@ -18,6 +18,13 @@ INSTALL = install all: $(TARGETS) +dalvik_OBJS = dalvik.o +dalvik_CFLAGS = $(CPPFLAGSF) $(CPPFLAGS) $(CFLAGSF) $(CFLAGS) +dalvik_LDFLAGS = $(LDFLAGSF) $(LDFLAGS) + +dalvik.so: $(dalvik_OBJS) + $(LD) -o dalvik.so $(dalvik_OBJS) $(dalvik_LDFLAGS) + i386_OBJS = i386.o i386_CFLAGS = $(CPPFLAGSF) $(CPPFLAGS) $(CFLAGSF) $(CFLAGS) i386_LDFLAGS = $(LDFLAGSF) $(LDFLAGS) @@ -74,6 +81,9 @@ sparc64_LDFLAGS = $(LDFLAGSF) $(LDFLAGS) sparc64.so: $(sparc64_OBJS) $(LD) -o sparc64.so $(sparc64_OBJS) $(sparc64_LDFLAGS) +dalvik.o: dalvik.c common.ins null.ins dalvik.ins dalvik.reg + $(CC) $(dalvik_CFLAGS) -c dalvik.c + i386.o: i386.c common.ins null.ins i386.h i386.ins i386.reg $(CC) $(i386_CFLAGS) -c i386.c @@ -99,12 +109,14 @@ sparc64.o: sparc64.c common.ins null.ins sparc.h sparc.ins sparc.reg $(CC) $(sparc64_CFLAGS) -c sparc64.c clean: - $(RM) -- $(i386_OBJS) $(i386_real_OBJS) $(i486_OBJS) $(i586_OBJS) $(i686_OBJS) $(java_OBJS) $(sparc_OBJS) $(sparc64_OBJS) + $(RM) -- $(dalvik_OBJS) $(i386_OBJS) $(i386_real_OBJS) $(i486_OBJS) $(i586_OBJS) $(i686_OBJS) $(java_OBJS) $(sparc_OBJS) $(sparc64_OBJS) distclean: clean $(RM) -- $(TARGETS) install: $(TARGETS) + $(MKDIR) $(DESTDIR)$(LIBDIR)/asm/arch + $(INSTALL) -m 0644 -- dalvik.so $(DESTDIR)$(LIBDIR)/asm/arch/dalvik.so $(MKDIR) $(DESTDIR)$(LIBDIR)/asm/arch $(INSTALL) -m 0644 -- i386.so $(DESTDIR)$(LIBDIR)/asm/arch/i386.so $(MKDIR) $(DESTDIR)$(LIBDIR)/asm/arch @@ -123,6 +135,7 @@ install: $(TARGETS) $(INSTALL) -m 0644 -- sparc64.so $(DESTDIR)$(LIBDIR)/asm/arch/sparc64.so uninstall: + $(RM) -- $(DESTDIR)$(LIBDIR)/asm/arch/dalvik.so $(RM) -- $(DESTDIR)$(LIBDIR)/asm/arch/i386.so $(RM) -- $(DESTDIR)$(LIBDIR)/asm/arch/i386_real.so $(RM) -- $(DESTDIR)$(LIBDIR)/asm/arch/i486.so diff --git a/src/arch/dalvik.c b/src/arch/dalvik.c new file mode 100644 index 0000000..a6c414e --- /dev/null +++ b/src/arch/dalvik.c @@ -0,0 +1,77 @@ +/* $Id$ */ +/* Copyright (c) 2011 Pierre Pronchery */ +/* This file is part of DeforaOS Devel asm */ +/* This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, version 3 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . */ + + + +#include +#include "Asm.h" + + +/* Dalvik */ +/* private */ +/* constants */ +/* register sizes */ +#define REG(name, size, id) REG_ ## name ## _size = size, +enum +{ +#include "dalvik.reg" + REG_size_count +}; +#undef REG + +/* register ids */ +#define REG(name, size, id) REG_ ## name ## _id = id, +enum +{ +#include "dalvik.reg" + REG_id_count +}; +#undef REG + + +/* variables */ +/* plug-in */ +static ArchDescription _dalvik_description = +{ "dex", ARCH_ENDIAN_LITTLE, 2, 0 }; + + +#define REG(name, size, id) { "" # name, size, id }, +static ArchRegister _dalvik_registers[] = +{ +#include "dalvik.reg" + { NULL, 0, 0 } +}; +#undef REG + +static ArchInstruction _dalvik_instructions[] = +{ +#include "dalvik.ins" +#include "common.ins" +#include "null.ins" +}; + + +/* public */ +/* variables */ +ArchPlugin arch_plugin = +{ + NULL, + "dalvik", + &_dalvik_description, + _dalvik_registers, + _dalvik_instructions, + NULL, + NULL +}; diff --git a/src/arch/dalvik.ins b/src/arch/dalvik.ins new file mode 100644 index 0000000..4c5e803 --- /dev/null +++ b/src/arch/dalvik.ins @@ -0,0 +1,177 @@ +/* $Id$ */ +/* Copyright (c) 2011 Pierre Pronchery */ +/* This file is part of DeforaOS Devel asm */ +/* This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, version 3 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . */ + + + +/* helpers */ +/* opcodes */ +#define OP1F (8 << AOD_SIZE) +#define OP2F (16 << AOD_SIZE) + +/* operands */ + +/* registers */ +#define OP_v0 AO_REGISTER(AOF_IMPLICIT, 32, REG_v0_id) +#define OP_REGISTER AO_REGISTER(0, 32, 0) + +/* immediate values */ +#define OP_U8 AO_IMMEDIATE(0, 0, 8) +#define OP_U16 AO_IMMEDIATE(0, 0, 16) +#define OP_U32 AO_IMMEDIATE(0, 0, 32) +#define OP_U64 AO_IMMEDIATE(0, 0, 64) + + +{ "add-double", 0xab, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "add-double/2addr", 0xcb, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "add-float", 0xa6, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "add-float/2addr", 0xc6, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "add-int", 0x90, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +#if 1 /* XXX implement correctly */ +{ "add-int/2addr", 0xb0, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +#endif +{ "add-int/lit8", 0xd8, OP1F, OP_REGISTER, OP_REGISTER, OP_U8 }, +{ "add-int/lit16", 0xd0, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +{ "add-long", 0x9b, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +#if 1 /* XXX implement correctly */ +{ "add-long/2addr", 0xbb, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +#endif +{ "aget", 0x44, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "aget-boolean", 0x47, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "aget-byte", 0x48, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "aget-char", 0x49, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "aget-object", 0x46, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "aget-short", 0x4a, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "aget-wide", 0x45, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "and-int", 0x95, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +#if 1 /* XXX implement correctly */ +{ "and-int/2addr", 0xb5, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +#endif +{ "and-int/lit8", 0xdd, OP1F, OP_REGISTER, OP_REGISTER, OP_U8 }, +{ "and-int/lit16", 0xd5, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +{ "and-long", 0xa0, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +#if 1 /* XXX implement correctly */ +{ "and-long/2addr", 0xc0, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +#endif +{ "aput", 0x4b, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "aput-boolean", 0x4e, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "aput-byte", 0x4f, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "aput-char", 0x50, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "aput-object", 0x4d, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "aput-short", 0x51, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "aput-wide", 0x4c, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +#if 1 /* XXX implement correctly */ +{ "array-length", 0x21, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "check-cast", 0x1f, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +#endif +{ "cmp-long", 0x31, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "cmpg-double", 0x30, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "cmpg-float", 0x2e, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "cmpl-double", 0x2f, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "cmpl-float", 0x2d, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "const", 0x14, OP1F, OP_REGISTER, OP_U32, AOT_NONE }, +#if 1 /* XXX really implement */ +{ "const/4", 0x12, OP1F, OP_v0, OP_U8, AOT_NONE }, +#endif +{ "const/16", 0x13, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +{ "const/high16", 0x15, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +{ "const-class", 0x1c, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +{ "const-string", 0x1a, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +{ "const-wide", 0x18, OP1F, OP_REGISTER, OP_U64, AOT_NONE }, +{ "const-wide/16", 0x16, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +{ "const-wide/32", 0x17, OP1F, OP_REGISTER, OP_U32, AOT_NONE }, +{ "div-double", 0xae, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "div-double/2addr", 0xce, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "div-float", 0xa9, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +{ "div-float/2addr", 0xc9, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "div-int", 0x93, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +#if 1 /* XXX implement correctly */ +{ "div-int/2addr", 0xb3, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +#endif +{ "div-int/lit8", 0xdb, OP1F, OP_REGISTER, OP_REGISTER, OP_U8 }, +{ "div-int/lit16", 0xd3, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +{ "div-long", 0x9e, OP1F, OP_REGISTER, OP_REGISTER, OP_REGISTER }, +#if 1 /* XXX implement correctly */ +{ "div-long/2addr", 0xbe, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "double-to-float", 0x8c, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "double-to-int", 0x8a, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "double-to-long", 0x8b, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +#if 1 /* XXX really implement */ +{ "fill-array-data", 0x26, OP1F, OP_REGISTER, OP_U32, AOT_NONE }, +{ "filled-new-array", 0x24, OP1F, OP_REGISTER, OP_U32, AOT_NONE }, +{ "filled-new-array-range", + 0x25, OP1F, OP_REGISTER, OP_U32, AOT_NONE }, +#endif +{ "float-to-double", 0x89, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "float-to-int", 0x8a, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "float-to-long", 0x88, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +#endif +{ "goto", 0x28, OP1F, OP_U8, AOT_NONE, AOT_NONE }, +{ "goto/16", 0x2900, OP2F, OP_U16, AOT_NONE, AOT_NONE }, +{ "if-eq", 0x32, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "if-eqz", 0x38, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +{ "if-ge", 0x35, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "if-gez", 0x3b, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +{ "if-gt", 0x36, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "if-gtz", 0x3c, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +{ "if-le", 0x37, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "if-lez", 0x3d, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +{ "if-lt", 0x34, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "if-ltz", 0x3a, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +{ "if-ne", 0x33, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "if-nez", 0x39, OP1F, OP_REGISTER, OP_U16, AOT_NONE }, +#if 1 /* XXX really implement */ +{ "iget", 0x52, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "iget-boolean", 0x55, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "iget-byte", 0x56, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "iget-char", 0x57, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "iget-object", 0x54, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "iget-short", 0x58, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "iget-wide", 0x53, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "int-to-byte", 0x8d, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "int-to-char", 0x8e, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "int-to-float", 0x82, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "int-to-long", 0x81, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "int-to-short", 0x8f, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "invoke-direct", 0x70, OP1F, OP_U8, OP_U16, OP_U16 }, +{ "invoke-direct/range",0x76, OP1F, OP_U8, OP_U16, OP_U16 }, +{ "invoke-interface", 0x72, OP1F, OP_U8, OP_U16, OP_U16 }, +{ "invoke-interface-range", + 0x78, OP1F, OP_U8, OP_U16, OP_U16 }, +{ "invoke-static", 0x71, OP1F, OP_U8, OP_U16, OP_U16 }, +{ "invoke-static/range",0x77, OP1F, OP_U8, OP_U16, OP_U16 }, +{ "invoke-super", 0x6f, OP1F, OP_U8, OP_U16, OP_U16 }, +{ "invoke-super/range", 0x75, OP1F, OP_U8, OP_U16, OP_U16 }, +{ "invoke-virtual", 0x6e, OP1F, OP_U8, OP_U16, OP_U16 }, +{ "invoke-virtual/range", + 0x74, OP1F, OP_U8, OP_U16, OP_U16 }, +{ "iput", 0x59, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "iput-boolean", 0x5c, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "iput-byte", 0x5d, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "iput-char", 0x5e, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "iput-object", 0x5b, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "iput-short", 0x5f, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "iput-wide", 0x5a, OP1F, OP_v0, OP_REGISTER, OP_U16 }, +{ "long-to-double", 0x86, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "long-to-float", 0x85, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +{ "long-to-int", 0x84, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +#endif +{ "monitor-enter", 0x1d, OP1F, OP_REGISTER, AOT_NONE, AOT_NONE }, +{ "monitor-exit", 0x1e, OP1F, OP_REGISTER, AOT_NONE, AOT_NONE }, +#if 1 /* XXX really implement */ +{ "move", 0x01, OP1F, OP_v0, OP_REGISTER, AOT_NONE }, +#endif +{ "move/16", 0x03, OP1F, OP_REGISTER, OP_REGISTER, AOT_NONE }, +{ "move/from16", 0x02, OP1F, OP_REGISTER, OP_REGISTER, AOT_NONE }, +{ "move-exception", 0x0d, OP1F, OP_REGISTER, AOT_NONE, AOT_NONE }, diff --git a/src/arch/dalvik.reg b/src/arch/dalvik.reg new file mode 100644 index 0000000..d96015f --- /dev/null +++ b/src/arch/dalvik.reg @@ -0,0 +1,256 @@ +REG(v0, 32, 0) +REG(v1, 32, 1) +REG(v2, 32, 2) +REG(v3, 32, 3) +REG(v4, 32, 4) +REG(v5, 32, 5) +REG(v6, 32, 6) +REG(v7, 32, 7) +REG(v8, 32, 8) +REG(v9, 32, 9) +REG(v10, 32, 10) +REG(v11, 32, 11) +REG(v12, 32, 12) +REG(v13, 32, 13) +REG(v14, 32, 14) +REG(v15, 32, 15) +REG(v16, 32, 16) +REG(v17, 32, 17) +REG(v18, 32, 18) +REG(v19, 32, 19) +REG(v20, 32, 20) +REG(v21, 32, 21) +REG(v22, 32, 22) +REG(v23, 32, 23) +REG(v24, 32, 24) +REG(v25, 32, 25) +REG(v26, 32, 26) +REG(v27, 32, 27) +REG(v28, 32, 28) +REG(v29, 32, 29) +REG(v30, 32, 30) +REG(v31, 32, 31) +REG(v32, 32, 32) +REG(v33, 32, 33) +REG(v34, 32, 34) +REG(v35, 32, 35) +REG(v36, 32, 36) +REG(v37, 32, 37) +REG(v38, 32, 38) +REG(v39, 32, 39) +REG(v40, 32, 40) +REG(v41, 32, 41) +REG(v42, 32, 42) +REG(v43, 32, 43) +REG(v44, 32, 44) +REG(v45, 32, 45) +REG(v46, 32, 46) +REG(v47, 32, 47) +REG(v48, 32, 48) +REG(v49, 32, 49) +REG(v50, 32, 50) +REG(v51, 32, 51) +REG(v52, 32, 52) +REG(v53, 32, 53) +REG(v54, 32, 54) +REG(v55, 32, 55) +REG(v56, 32, 56) +REG(v57, 32, 57) +REG(v58, 32, 58) +REG(v59, 32, 59) +REG(v60, 32, 60) +REG(v61, 32, 61) +REG(v62, 32, 62) +REG(v63, 32, 63) +REG(v64, 32, 64) +REG(v65, 32, 65) +REG(v66, 32, 66) +REG(v67, 32, 67) +REG(v68, 32, 68) +REG(v69, 32, 69) +REG(v70, 32, 70) +REG(v71, 32, 71) +REG(v72, 32, 72) +REG(v73, 32, 73) +REG(v74, 32, 74) +REG(v75, 32, 75) +REG(v76, 32, 76) +REG(v77, 32, 77) +REG(v78, 32, 78) +REG(v79, 32, 79) +REG(v80, 32, 80) +REG(v81, 32, 81) +REG(v82, 32, 82) +REG(v83, 32, 83) +REG(v84, 32, 84) +REG(v85, 32, 85) +REG(v86, 32, 86) +REG(v87, 32, 87) +REG(v88, 32, 88) +REG(v89, 32, 89) +REG(v90, 32, 90) +REG(v91, 32, 91) +REG(v92, 32, 92) +REG(v93, 32, 93) +REG(v94, 32, 94) +REG(v95, 32, 95) +REG(v96, 32, 96) +REG(v97, 32, 97) +REG(v98, 32, 98) +REG(v99, 32, 99) +REG(v100, 32, 100) +REG(v101, 32, 101) +REG(v102, 32, 102) +REG(v103, 32, 103) +REG(v104, 32, 104) +REG(v105, 32, 105) +REG(v106, 32, 106) +REG(v107, 32, 107) +REG(v108, 32, 108) +REG(v109, 32, 109) +REG(v110, 32, 110) +REG(v111, 32, 111) +REG(v112, 32, 112) +REG(v113, 32, 113) +REG(v114, 32, 114) +REG(v115, 32, 115) +REG(v116, 32, 116) +REG(v117, 32, 117) +REG(v118, 32, 118) +REG(v119, 32, 119) +REG(v120, 32, 120) +REG(v121, 32, 121) +REG(v122, 32, 122) +REG(v123, 32, 123) +REG(v124, 32, 124) +REG(v125, 32, 125) +REG(v126, 32, 126) +REG(v127, 32, 127) +REG(v128, 32, 128) +REG(v129, 32, 129) +REG(v130, 32, 130) +REG(v131, 32, 131) +REG(v132, 32, 132) +REG(v133, 32, 133) +REG(v134, 32, 134) +REG(v135, 32, 135) +REG(v136, 32, 136) +REG(v137, 32, 137) +REG(v138, 32, 138) +REG(v139, 32, 139) +REG(v140, 32, 140) +REG(v141, 32, 141) +REG(v142, 32, 142) +REG(v143, 32, 143) +REG(v144, 32, 144) +REG(v145, 32, 145) +REG(v146, 32, 146) +REG(v147, 32, 147) +REG(v148, 32, 148) +REG(v149, 32, 149) +REG(v150, 32, 150) +REG(v151, 32, 151) +REG(v152, 32, 152) +REG(v153, 32, 153) +REG(v154, 32, 154) +REG(v155, 32, 155) +REG(v156, 32, 156) +REG(v157, 32, 157) +REG(v158, 32, 158) +REG(v159, 32, 159) +REG(v160, 32, 160) +REG(v161, 32, 161) +REG(v162, 32, 162) +REG(v163, 32, 163) +REG(v164, 32, 164) +REG(v165, 32, 165) +REG(v166, 32, 166) +REG(v167, 32, 167) +REG(v168, 32, 168) +REG(v169, 32, 169) +REG(v170, 32, 170) +REG(v171, 32, 171) +REG(v172, 32, 172) +REG(v173, 32, 173) +REG(v174, 32, 174) +REG(v175, 32, 175) +REG(v176, 32, 176) +REG(v177, 32, 177) +REG(v178, 32, 178) +REG(v179, 32, 179) +REG(v180, 32, 180) +REG(v181, 32, 181) +REG(v182, 32, 182) +REG(v183, 32, 183) +REG(v184, 32, 184) +REG(v185, 32, 185) +REG(v186, 32, 186) +REG(v187, 32, 187) +REG(v188, 32, 188) +REG(v189, 32, 189) +REG(v190, 32, 190) +REG(v191, 32, 191) +REG(v192, 32, 192) +REG(v193, 32, 193) +REG(v194, 32, 194) +REG(v195, 32, 195) +REG(v196, 32, 196) +REG(v197, 32, 197) +REG(v198, 32, 198) +REG(v199, 32, 199) +REG(v200, 32, 200) +REG(v201, 32, 201) +REG(v202, 32, 202) +REG(v203, 32, 203) +REG(v204, 32, 204) +REG(v205, 32, 205) +REG(v206, 32, 206) +REG(v207, 32, 207) +REG(v208, 32, 208) +REG(v209, 32, 209) +REG(v210, 32, 210) +REG(v211, 32, 211) +REG(v212, 32, 212) +REG(v213, 32, 213) +REG(v214, 32, 214) +REG(v215, 32, 215) +REG(v216, 32, 216) +REG(v217, 32, 217) +REG(v218, 32, 218) +REG(v219, 32, 219) +REG(v220, 32, 220) +REG(v221, 32, 221) +REG(v222, 32, 222) +REG(v223, 32, 223) +REG(v224, 32, 224) +REG(v225, 32, 225) +REG(v226, 32, 226) +REG(v227, 32, 227) +REG(v228, 32, 228) +REG(v229, 32, 229) +REG(v230, 32, 230) +REG(v231, 32, 231) +REG(v232, 32, 232) +REG(v233, 32, 233) +REG(v234, 32, 234) +REG(v235, 32, 235) +REG(v236, 32, 236) +REG(v237, 32, 237) +REG(v238, 32, 238) +REG(v239, 32, 239) +REG(v240, 32, 240) +REG(v241, 32, 241) +REG(v242, 32, 242) +REG(v243, 32, 243) +REG(v244, 32, 244) +REG(v245, 32, 245) +REG(v246, 32, 246) +REG(v247, 32, 247) +REG(v248, 32, 248) +REG(v249, 32, 249) +REG(v250, 32, 250) +REG(v251, 32, 251) +REG(v252, 32, 252) +REG(v253, 32, 253) +REG(v254, 32, 254) +REG(v255, 32, 255) diff --git a/src/arch/project.conf b/src/arch/project.conf index 9d2c78c..8e05d70 100644 --- a/src/arch/project.conf +++ b/src/arch/project.conf @@ -1,8 +1,16 @@ -targets=i386,i386_real,i486,i586,i686,java,sparc,sparc64 +targets=dalvik,i386,i386_real,i486,i586,i686,java,sparc,sparc64 cppflags_force=-I ../../include cflags_force=-W `pkg-config --cflags libSystem` cflags=-Wall -fPIC -pedantic -dist=Makefile,common.ins,i386.h,i386.ins,i386.reg,i486.ins,i586.ins,i686.ins,i686.reg,null.ins,sparc.h,sparc.ins,sparc.reg +dist=Makefile,common.ins,dalvik.ins,dalvik.reg,i386.h,i386.ins,i386.reg,i486.ins,i586.ins,i686.ins,i686.reg,null.ins,sparc.h,sparc.ins,sparc.reg + +[dalvik] +type=plugin +sources=dalvik.c +install=$(LIBDIR)/asm/arch + +[dalvik.c] +depends=common.ins,null.ins,dalvik.ins,dalvik.reg [i386] type=plugin