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Add the instruction pointer for x86

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This commit is contained in:
Pierre Pronchery 2015-09-26 01:21:35 +02:00
parent dad5027387
commit b4bfb9796f
2 changed files with 5 additions and 0 deletions
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1
src/arch/amd64.reg
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@ -15,6 +15,7 @@ REG(r12, 64, 0x0c, 0, "General-purpose register")
REG(r13, 64, 0x0d, 0, "General-purpose register") REG(r13, 64, 0x0d, 0, "General-purpose register")
REG(r14, 64, 0x0e, 0, "General-purpose register") REG(r14, 64, 0x0e, 0, "General-purpose register")
REG(r15, 64, 0x0f, 0, "General-purpose register") REG(r15, 64, 0x0f, 0, "General-purpose register")
REG(rip, 64, 0x10, 0, "Instruction pointer")
/* aliases */ /* aliases */
/* 8 bits */ /* 8 bits */
REG(r0b, 8, 0x00, ARF_ALIAS,NULL) REG(r0b, 8, 0x00, ARF_ALIAS,NULL)

4
src/arch/i386.reg
View File

@ -22,6 +22,7 @@ REG(ds, 16, 0x0a, 0, "Segment register")
REG(es, 16, 0x0b, 0, "Segment register") REG(es, 16, 0x0b, 0, "Segment register")
REG(fs, 16, 0x0c, 0, "Segment register") REG(fs, 16, 0x0c, 0, "Segment register")
REG(gs, 16, 0x0d, 0, "Segment register") REG(gs, 16, 0x0d, 0, "Segment register")
REG(ip, 16, 0x10, 0, "Instruction pointer")
#else #else
REG(ax, 16, 0x00, ARF_ALIAS, "General-purpose register (lowest 16-bits of eax)") REG(ax, 16, 0x00, ARF_ALIAS, "General-purpose register (lowest 16-bits of eax)")
REG(cx, 16, 0x01, ARF_ALIAS, "General-purpose register (lowest 16-bits of ecx)") REG(cx, 16, 0x01, ARF_ALIAS, "General-purpose register (lowest 16-bits of ecx)")
@ -37,6 +38,7 @@ REG(ds, 16, 0x0a, ARF_ALIAS, "Segment register")
REG(es, 16, 0x0b, ARF_ALIAS, "Segment register") REG(es, 16, 0x0b, ARF_ALIAS, "Segment register")
REG(fs, 16, 0x0c, ARF_ALIAS, "Segment register") REG(fs, 16, 0x0c, ARF_ALIAS, "Segment register")
REG(gs, 16, 0x0d, ARF_ALIAS, "Segment register") REG(gs, 16, 0x0d, ARF_ALIAS, "Segment register")
REG(ip, 16, 0x10, ARF_ALIAS, "Instruction pointer")
# ifdef ARCH_amd64 # ifdef ARCH_amd64
REG(eax,32, 0x00, ARF_ALIAS, "General-purpose register (lowest 32-bits of rax)") REG(eax,32, 0x00, ARF_ALIAS, "General-purpose register (lowest 32-bits of rax)")
REG(ecx,32, 0x01, ARF_ALIAS, "General-purpose register (lowest 32-bits of rcx)") REG(ecx,32, 0x01, ARF_ALIAS, "General-purpose register (lowest 32-bits of rcx)")
@ -46,6 +48,7 @@ REG(esp,32, 0x04, ARF_ALIAS, "Stack pointer (lowest 32-bits of rsp)")
REG(ebp,32, 0x05, ARF_ALIAS, "Base pointer (lowest 32-bits of rbp)") REG(ebp,32, 0x05, ARF_ALIAS, "Base pointer (lowest 32-bits of rbp)")
REG(esi,32, 0x06, ARF_ALIAS, "Array index (lowest 32-bits of rsi)") REG(esi,32, 0x06, ARF_ALIAS, "Array index (lowest 32-bits of rsi)")
REG(edi,32, 0x07, ARF_ALIAS, "Array index (lowest 32-bits of rdi)") REG(edi,32, 0x07, ARF_ALIAS, "Array index (lowest 32-bits of rdi)")
REG(eip,32, 0x10, ARF_ALIAS, "Instruction pointer (lowest 32-bits of rip)")
# else # else
REG(eax,32, 0x00, 0, "General-purpose register") REG(eax,32, 0x00, 0, "General-purpose register")
REG(ecx,32, 0x01, 0, "General-purpose register") REG(ecx,32, 0x01, 0, "General-purpose register")
@ -55,6 +58,7 @@ REG(esp,32, 0x04, 0, "Stack pointer")
REG(ebp,32, 0x05, 0, "Base pointer") REG(ebp,32, 0x05, 0, "Base pointer")
REG(esi,32, 0x06, 0, "Array index") REG(esi,32, 0x06, 0, "Array index")
REG(edi,32, 0x07, 0, "Array index") REG(edi,32, 0x07, 0, "Array index")
REG(eip,32, 0x10, 0, "Instruction pointer")
# endif /* ARCH_amd64 */ # endif /* ARCH_amd64 */
#endif /* !ARCH_i386_real */ #endif /* !ARCH_i386_real */
REG(cr0,32, 0x00, 0, "Control register") REG(cr0,32, 0x00, 0, "Control register")