Beginning to get the Mod R/M byte right (not considering the SIB at all)
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@ -67,11 +67,10 @@ typedef enum _ArchOperandType
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# define AOM_VALUE 0x000000ff
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/* flags */
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# define AOF_FILTER 0x1
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/* for immediate */
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# define AOF_SIGNED 0x2
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# define AOF_SIGNED 0x1
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/* for registers */
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# define AOF_IMPLICIT 0x2
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# define AOF_IMPLICIT 0x1
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/* macros */
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# define AO_GET_FLAGS(operand) ((operand & AOM_FLAGS) >> AOD_FLAGS)
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@ -118,17 +118,51 @@ static int _i386_write(ArchPlugin * plugin, ArchInstruction * instruction,
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static int _write_dregister(ArchPlugin * plugin,
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ArchOperandDefinition definition, ArchOperand * operand)
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{
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/* FIXME really implement */
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return _write_register(plugin, definition, operand);
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ArchPluginHelper * helper = plugin->helper;
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char const * name = operand->value._register.name;
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size_t size = AO_GET_SIZE(definition);
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ArchRegister * ar;
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ArchOperandDefinition idefinition;
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ArchOperand ioperand;
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if((ar = helper->get_register_by_name_size(helper->arch, name, size))
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== NULL)
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return -1;
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/* write register */
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idefinition = AO_IMMEDIATE(0, 0, 8);
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memset(&ioperand, 0, sizeof(ioperand));
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ioperand.type = AOT_IMMEDIATE;
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ioperand.value.immediate.value = ar->id;
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if(AO_GET_FLAGS(definition) & AOF_I386_MODRM)
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ioperand.value.immediate.value |= (AO_GET_VALUE(definition)
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<< 3);
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if(operand->value.dregister.offset == 0)
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/* there is no offset */
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return _write_immediate(plugin, idefinition, &ioperand);
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/* declare offset */
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switch(AO_GET_OFFSET(definition) >> 3)
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{
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case sizeof(uint8_t):
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ioperand.value.immediate.value |= 0x40;
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break;
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case W >> 3:
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ioperand.value.immediate.value |= 0x80;
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break;
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default:
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return -1; /* FIXME report error */
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}
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if(_write_immediate(plugin, idefinition, &ioperand) != 0)
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return -1;
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/* write offset */
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idefinition = AO_IMMEDIATE(0, 0, AO_GET_OFFSET(definition));
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ioperand.value.immediate.value = operand->value.dregister.offset;
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return _write_immediate(plugin, idefinition, &ioperand);
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}
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static int _write_immediate(ArchPlugin * plugin,
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ArchOperandDefinition definition, ArchOperand * operand)
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{
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size_t size;
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size = AO_GET_SIZE(definition) >> 3;
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switch(size)
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switch(AO_GET_SIZE(definition) >> 3)
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{
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case 0:
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return 0;
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@ -231,6 +265,10 @@ static int _write_register(ArchPlugin * plugin,
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idefinition = AO_IMMEDIATE(0, 0, 8);
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memset(&ioperand, 0, sizeof(ioperand));
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ioperand.type = AOT_IMMEDIATE;
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ioperand.value.immediate.value = ar->id;
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if(AO_GET_FLAGS(definition) & AOF_I386_MODRM)
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ioperand.value.immediate.value = 0xc0 | ar->id
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| (AO_GET_VALUE(definition) << 3);
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else
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ioperand.value.immediate.value = ar->id;
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return _write_immediate(plugin, idefinition, &ioperand);
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}
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@ -7,40 +7,55 @@
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# define REG_AX_id REG_eax_id
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#endif
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/* helpers */
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/* opcodes */
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#define OP1F (8 << AOD_SIZE)
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#define OP2F (16 << AOD_SIZE)
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/* operands */
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/* registers */
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#define OP_R8 AO_REGISTER(0, 8, 0)
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#define OP_RW AO_REGISTER(0, W, 0)
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#define OP_al AO_REGISTER(AOF_IMPLICIT, REG_al_size, REG_al_id)
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#define OP_AX AO_REGISTER(AOF_IMPLICIT, W, REG_AX_id)
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/* helpers */
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#define OP1F (8 << AOD_SIZE)
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#define OP2F (16 << AOD_SIZE)
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/* mod r/m byte */
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#define OP_RM8_D0 AO_DREGISTER(0, 0, 8, 0)
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#define OP_RM8_D8 AO_DREGISTER(0, 8, 8, 0)
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#define OP_RM8_DW AO_DREGISTER(0, W, 8, 0)
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#define OP_RM8_RW AO_REGISTER(0, 8, 0)
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#define OP_RMW_D0 AO_DREGISTER(0, 0, W, 0)
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#define OP_RMW_D8 AO_DREGISTER(0, 8, W, 0)
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#define OP_RMW_DW AO_DREGISTER(0, W, W, 0)
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#define OP_RMW_RW AO_REGISTER(0, W, 0)
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#define AOF_I386_MODRM 0x2
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#define OP_RM8_D0 AO_DREGISTER(AOF_I386_MODRM, 0, W, 0) /* 0x00 */
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#define OP_RM8_D8 AO_DREGISTER(AOF_I386_MODRM, 8, W, 0) /* 0x40 */
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#define OP_RM8_DW AO_DREGISTER(AOF_I386_MODRM, W, W, 0) /* 0x80 */
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#define OP_RM8_R8 AO_REGISTER(AOF_I386_MODRM, 8, 0) /* 0xc0 */
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#define OP_RMW_D0 AO_DREGISTER(AOF_I386_MODRM, 0, W, 0) /* 0x00 */
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#define OP_RMW_D8 AO_DREGISTER(AOF_I386_MODRM, 8, W, 0) /* 0x40 */
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#define OP_RMW_DW AO_DREGISTER(AOF_I386_MODRM, W, W, 0) /* 0x80 */
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#define OP_RMW_RW AO_REGISTER(AOF_I386_MODRM, W, 0) /* 0xc0 */
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/* immediate values */
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#define OP_U8 AO_IMMEDIATE(0, 0, 8)
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#define OP_UW AO_IMMEDIATE(0, 0, W)
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/* instructions */
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{ "aaa", 0x37, OP1F, AOT_NONE, AOT_NONE, AOT_NONE },
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{ "aad", 0xd50a, OP2F, AOT_NONE, AOT_NONE, AOT_NONE },
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{ "aad", 0xd5, OP1F, OP_U8, AOT_NONE, AOT_NONE },
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{ "aam", 0xd40a, OP2F, AOT_NONE, AOT_NONE, AOT_NONE },
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{ "aam", 0xd4, OP1F, OP_U8, AOT_NONE, AOT_NONE },
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{ "aas", 0x3f, OP1F, AOT_NONE, AOT_NONE, AOT_NONE },
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{ "adc", 0x14, OP1F, OP_al, OP_U8, AOT_NONE },
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{ "adc", 0x15, OP1F, OP_AX, OP_UW, AOT_NONE },
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{ "adc", 0x80, OP1F, OP_RM8_D0,OP_U8, AOT_NONE },
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{ "adc", 0x80, OP1F, OP_RM8_D8,OP_U8, AOT_NONE },
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{ "adc", 0x80, OP1F, OP_RM8_DW,OP_U8, AOT_NONE },
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{ "adc", 0x80, OP1F, OP_RM8_RW,OP_U8, AOT_NONE },
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{ "adc", 0x81, OP1F, OP_RMW_D0,OP_UW, AOT_NONE },
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{ "adc", 0x81, OP1F, OP_RMW_D8,OP_UW, AOT_NONE },
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{ "adc", 0x81, OP1F, OP_RMW_DW,OP_UW, AOT_NONE },
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{ "adc", 0x81, OP1F, OP_RMW_RW,OP_UW, AOT_NONE },
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{ "nop", 0x90, OP1F, AOT_NONE, AOT_NONE, AOT_NONE },
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/* ADC 0x14 ib 1 al imm8 */
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{ "adc", 0x14, OP1F, OP_al, OP_U8, AOT_NONE },
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/* ADC 0x15 iW 1 AX immW */
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{ "adc", 0x15, OP1F, OP_AX, OP_UW, AOT_NONE },
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/* ADC 0x80 /2 ib 1 r/m8 imm8 */
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{ "adc", 0x80, OP1F, OP_RM8_D0+2,OP_U8, AOT_NONE },
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{ "adc", 0x80, OP1F, OP_RM8_D8+2,OP_U8, AOT_NONE },
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{ "adc", 0x80, OP1F, OP_RM8_DW+2,OP_U8, AOT_NONE },
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{ "adc", 0x80, OP1F, OP_RM8_R8+2,OP_U8, AOT_NONE },
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/* ADC 0x81 /2 iW 1 r/m8 imm8 */
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{ "adc", 0x81, OP1F, OP_RMW_D0+2,OP_UW, AOT_NONE },
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{ "adc", 0x81, OP1F, OP_RMW_D8+2,OP_UW, AOT_NONE },
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{ "adc", 0x81, OP1F, OP_RMW_DW+2,OP_UW, AOT_NONE },
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{ "adc", 0x81, OP1F, OP_RMW_RW+2,OP_UW, AOT_NONE },
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/* NOP */
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{ "nop", 0x90, OP1F, AOT_NONE, AOT_NONE, AOT_NONE },
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21
test/i386.S
21
test/i386.S
@ -1,3 +1,4 @@
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/* $Id$ */
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.text
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aaa
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aad
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@ -5,11 +6,17 @@
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aam
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aam $0x42
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aas
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adc %al, $0x42
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adc %eax, $0x42
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adc [%edx], $0x42
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adc [%ebx + $0x5], $0x42
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adc %ecx, $0x42
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adc [%edx], $0x42434445
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adc %ebx, $0x42434445
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/* ADC */
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adc %al, $0x40 /* 14 40 */
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adc %eax, $0x41424344 /* 15 41 42 43 44 */
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adc [%edx], $0x46 /* 80 12 46 */
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adc [%ebx + $0x15], $0x47 /* 80 53 15 47 */
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adc [%ebx + $0x16171819], $0x48 /* 80 93 19 18 17 16 48 */
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adc %cl, $0x45 /* 80 d1 45 */
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adc [%edx], $0x46474849 /* 81 12 46 47 48 49 */
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adc [%ebx + $0x14], $0x4748494a /* 81 53 14 47 48 49 4a */
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adc [%ebx + $0x16171819], $0x48494a4b
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/* 81 93 19 18 17 16 4b */
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/* 4a 49 48 */
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adc %ecx, $0x45464748 /* 81 d1 45 46 47 48 */
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nop
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