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Set the 32-bits registers as aliases on amd64

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This commit is contained in:
Pierre Pronchery 2015-09-07 23:29:39 +02:00
parent 9bed564a4b
commit fe86cfd8ae
1 changed files with 11 additions and 0 deletions
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11
src/arch/i386.reg
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@ -37,6 +37,16 @@ REG(ds, 16, 0x0a, ARF_ALIAS, "Segment register")
REG(es, 16, 0x0b, ARF_ALIAS, "Segment register")
REG(fs, 16, 0x0c, ARF_ALIAS, "Segment register")
REG(gs, 16, 0x0d, ARF_ALIAS, "Segment register")
# ifdef ARCH_amd64
REG(eax,32, 0x00, ARF_ALIAS, "General-purpose register (lowest 32-bits of rax)")
REG(ecx,32, 0x01, ARF_ALIAS, "General-purpose register (lowest 32-bits of rcx)")
REG(edx,32, 0x02, ARF_ALIAS, "General-purpose register (lowest 32-bits of rdx)")
REG(ebx,32, 0x03, ARF_ALIAS, "General-purpose register (lowest 32-bits of rbx)")
REG(esp,32, 0x04, ARF_ALIAS, "Stack pointer (lowest 32-bits of rsp)")
REG(ebp,32, 0x05, ARF_ALIAS, "Base pointer (lowest 32-bits of rbp)")
REG(esi,32, 0x06, ARF_ALIAS, "Array index (lowest 32-bits of rsi)")
REG(edi,32, 0x07, ARF_ALIAS, "Array index (lowest 32-bits of rdi)")
# else
REG(eax,32, 0x00, 0, "General-purpose register")
REG(ecx,32, 0x01, 0, "General-purpose register")
REG(edx,32, 0x02, 0, "General-purpose register")
@ -45,6 +55,7 @@ REG(esp,32, 0x04, 0, "Stack pointer")
REG(ebp,32, 0x05, 0, "Base pointer")
REG(esi,32, 0x06, 0, "Array index")
REG(edi,32, 0x07, 0, "Array index")
# endif /* ARCH_amd64 */
#endif /* !ARCH_i386_real */
REG(cr0,32, 0x00, 0, "Control register")
REG(cr1,32, 0x01, 0, "Control register")