22 lines
271 B
Plaintext
22 lines
271 B
Plaintext
targets=top.vhdl,top.vvp,top.fpga,s p a c e.fpga
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verilog=iverilog
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[top.fpga]
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type=object
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vflags=-tfpga
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sources=top.v
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[top.vhdl]
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type=object
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vflags=-tvhdl
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sources=top.v
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[top.vvp]
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type=object
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sources=top.v
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[s p a c e.fpga]
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type=object
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vflags=-tfpga
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sources=s p a c e.v
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