Specify the verilog program

This helps configure and build libFPGA by default for the moment.
This commit is contained in:
Pierre Pronchery 2017-11-09 02:18:43 +01:00
parent 5e9894792d
commit 205c9683a0

View File

@ -1,5 +1,6 @@
targets=counter.vvp,delay.vvp targets=counter.vvp,delay.vvp
dist=Makefile,system.v dist=Makefile,system.v
verilog=iverilog
[counter.vvp] [counter.vvp]
type=object type=object