Added the "fchs", "fclex" and "fnclex" instructions
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3a46ad6684
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@ -34,6 +34,7 @@ static int _write_immediate(ArchPlugin * plugin,
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ArchOperandDefinition definition, ArchOperand * operand);
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static int _write_immediate8(ArchPlugin * plugin, uint8_t value);
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static int _write_immediate16(ArchPlugin * plugin, uint16_t value);
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static int _write_immediate24(ArchPlugin * plugin, uint32_t value);
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static int _write_immediate32(ArchPlugin * plugin, uint32_t value);
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static int _write_opcode(ArchPlugin * plugin, ArchInstruction * instruction);
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static int _write_operand(ArchPlugin * plugin, uint32_t * i,
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@ -136,6 +137,8 @@ static int _write_immediate(ArchPlugin * plugin,
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return _write_immediate8(plugin, value);
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case sizeof(uint16_t):
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return _write_immediate16(plugin, value);
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case 3:
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return _write_immediate24(plugin, value);
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case sizeof(uint32_t):
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return _write_immediate32(plugin, value);
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default:
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@ -160,6 +163,15 @@ static int _write_immediate16(ArchPlugin * plugin, uint16_t value)
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return 0;
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}
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static int _write_immediate24(ArchPlugin * plugin, uint32_t value)
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{
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value = _htol32(value) >> 8;
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if(fwrite(&value, 3, 1, plugin->helper->fp) != 1)
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return -error_set_code(1, "%s: %s", plugin->helper->filename,
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strerror(errno));
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return 0;
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}
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static int _write_immediate32(ArchPlugin * plugin, uint32_t value)
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{
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value = _htol32(value);
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@ -188,6 +200,7 @@ static int _write_opcode(ArchPlugin * plugin, ArchInstruction * instruction)
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operand.value.immediate.value = _htob16(
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instruction->opcode);
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break;
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case 3:
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case sizeof(uint32_t):
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operand.value.immediate.value = _htob32(
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instruction->opcode);
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@ -43,6 +43,7 @@
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/* opcodes */
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#define OP1F (8 << AOD_SIZE)
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#define OP2F (16 << AOD_SIZE)
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#define OP3F (24 << AOD_SIZE)
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/* operands */
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/* registers */
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@ -399,9 +400,19 @@
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{ "faddp", 0xdec5, OP2F, OP_st5, OP_st0, AOT_NONE },
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{ "faddp", 0xdec6, OP2F, OP_st6, OP_st0, AOT_NONE },
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{ "faddp", 0xdec7, OP2F, OP_st7, OP_st0, AOT_NONE },
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/* FBLD 0xdf /4 1 m80dec */
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/* FIXME implement */
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/* FBSTP 0xdf /6 1 m80bcd */
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/* FCHS 0xd9e0 2 */
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{ "fchs", 0xd9e0, OP2F, AOT_NONE, AOT_NONE, AOT_NONE },
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/* FCLEX 0x9bdbe2 3 */
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{ "fclex", 0x9bdbe2, OP3F, AOT_NONE, AOT_NONE, AOT_NONE },
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/* FIXME implement */
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/* FIADD 0xda /0 1 m32int */
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/* FIXME implement */
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/* FIADD 0xde /0 1 m64int */
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/* FNCLEX 0xdbe2 2 */
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{ "fnclex", 0xdbe2, OP2F, AOT_NONE, AOT_NONE, AOT_NONE },
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/* FIXME implement */
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/* NOP 0x90 1 */
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{ "nop", 0x90, OP1F, AOT_NONE, AOT_NONE, AOT_NONE },
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@ -141,4 +141,7 @@
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faddp %st5, %st0
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faddp %st6, %st0
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faddp %st7, %st0
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fchs
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fclex
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fnclex
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nop /* 0x90 */
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