Added the "xor" instruction (some occurences may have to be suffixed with "b")
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@ -403,16 +403,61 @@
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/* FBLD 0xdf /4 1 m80dec */
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/* FIXME implement */
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/* FBSTP 0xdf /6 1 m80bcd */
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/* FIXME implement */
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/* FCHS 0xd9e0 2 */
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{ "fchs", 0xd9e0, OP2F, AOT_NONE, AOT_NONE, AOT_NONE },
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/* FCLEX 0x9bdbe2 3 */
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{ "fclex", 0x9bdbe2, OP3F, AOT_NONE, AOT_NONE, AOT_NONE },
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/* FCMOVcc */
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/* FIXME implement */
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/* FIADD 0xda /0 1 m32int */
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/* FIXME implement */
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/* FIADD 0xde /0 1 m64int */
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/* FIXME implement */
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/* FNCLEX 0xdbe2 2 */
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{ "fnclex", 0xdbe2, OP2F, AOT_NONE, AOT_NONE, AOT_NONE },
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/* FIXME implement */
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/* NOP 0x90 1 */
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{ "nop", 0x90, OP1F, AOT_NONE, AOT_NONE, AOT_NONE },
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/* XOR 0x30 /r 1 r/m8 r8 */
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{ "xor", 0x30, OP1F, OP_RM8_D0_R,OP_R8, AOT_NONE },
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{ "xor", 0x30, OP1F, OP_RM8_D8_R,OP_R8, AOT_NONE },
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{ "xor", 0x30, OP1F, OP_RM8_DW_R,OP_R8, AOT_NONE },
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{ "xor", 0x30, OP1F, OP_RM8_R8_R,OP_R8, AOT_NONE },
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/* XOR 0x31 /r 1 r/mW rW */
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{ "xor", 0x31, OP1F, OP_RMW_D0_R,OP_RW, AOT_NONE },
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{ "xor", 0x31, OP1F, OP_RMW_D8_R,OP_RW, AOT_NONE },
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{ "xor", 0x31, OP1F, OP_RMW_DW_R,OP_RW, AOT_NONE },
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{ "xor", 0x31, OP1F, OP_RMW_RW_R,OP_RW, AOT_NONE },
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/* XOR 0x32 /r 1 r8 r/m8 */
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#if 1 /* FIXME doesn't work at the moment */
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{ "xor", 0x32, OP1F, OP_RM8_R8_R,OP_RM8_D0_R,AOT_NONE },
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{ "xor", 0x32, OP1F, OP_RM8_R8_R,OP_RM8_D8_R,AOT_NONE },
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{ "xor", 0x32, OP1F, OP_RM8_R8_R,OP_RM8_DW_R,AOT_NONE },
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{ "xor", 0x32, OP1F, OP_RM8_R8_R,OP_RM8_R8_R,AOT_NONE },
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#endif
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/* XOR 0x33 /r 1 rW r/mW */
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#if 1 /* FIXME doesn't work at the moment */
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{ "xor", 0x33, OP1F, OP_RMW_RW_R,OP_RMW_D0_R,AOT_NONE },
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{ "xor", 0x33, OP1F, OP_RMW_RW_R,OP_RMW_D8_R,AOT_NONE },
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{ "xor", 0x33, OP1F, OP_RMW_RW_R,OP_RMW_DW_R,AOT_NONE },
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{ "xor", 0x33, OP1F, OP_RMW_RW_R,OP_RMW_RW_R,AOT_NONE },
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#endif
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/* XOR 0x34 ib 1 al imm8 */
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{ "xor", 0x34, OP1F, OP_al, OP_S8, AOT_NONE },
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/* XOR 0x35 iW 1 AX immW */
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{ "xor", 0x35, OP1F, OP_AX, OP_SW, AOT_NONE },
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/* XOR 0x80 /6 ib 1 r/m8 imm8 */
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{ "xor", 0x80, OP1F, OP_RM8_D0+6,OP_S8, AOT_NONE },
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{ "xor", 0x80, OP1F, OP_RM8_D8+6,OP_S8, AOT_NONE },
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{ "xor", 0x80, OP1F, OP_RM8_DW+6,OP_S8, AOT_NONE },
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{ "xor", 0x80, OP1F, OP_RM8_R8+6,OP_S8, AOT_NONE },
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/* XOR 0x81 /6 iW 1 r/mW imm8 */
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{ "xor", 0x81, OP1F, OP_RMW_D0+6,OP_SW, AOT_NONE },
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{ "xor", 0x81, OP1F, OP_RMW_D8+6,OP_SW, AOT_NONE },
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{ "xor", 0x81, OP1F, OP_RMW_DW+6,OP_SW, AOT_NONE },
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{ "xor", 0x81, OP1F, OP_RMW_RW+6,OP_SW, AOT_NONE },
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/* XOR 0x83 /6 i8 1 r/mW imm8 */
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{ "xor", 0x83, OP1F, OP_RMW_D0+6,OP_S8, AOT_NONE },
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{ "xor", 0x83, OP1F, OP_RMW_D8+6,OP_S8, AOT_NONE },
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{ "xor", 0x83, OP1F, OP_RMW_DW+6,OP_S8, AOT_NONE },
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{ "xor", 0x83, OP1F, OP_RMW_RW+6,OP_S8, AOT_NONE },
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25
test/i386.S
25
test/i386.S
@ -145,3 +145,28 @@
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fclex
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fnclex
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nop /* 0x90 */
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/* XOR */
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xor [%ecx], %dh /* 30 31 */
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xor [%ecx+$0x50], %dh /* 30 71 50 */
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xor %bl, %bh /* 30 fb */
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xor %eax, %eax /* 31 c0 */
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xor [%eax], %eax /* 31 00 */
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#if 1 /* FIXME doesn't work at the moment */
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xor %dh, [%ecx] /* 32 */
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xor %bl, %bh /* 32 */
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xor %edx, [%ecx] /* 33 */
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xor %ebx, %ebx /* 33 */
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#endif
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xor %al, $0x40 /* 34 40 */
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xor %eax, $0x41424344 /* 35 44 43 42 41 */
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xor [%edx], $0x46 /* 80 32 46 */
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xor [%ebx + $0x15], $0x47 /* 80 73 15 47 */
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xor [%ebx + $0x16171819], $0x48 /* 80 b3 19 18 17 16 48 */
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xor %cl, $0x45 /* 80 f1 45 */
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xor [%edx], $0x46474849 /* 81 32 46 47 48 49 */
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xor [%ebx + $0x14], $0x4748494a /* 81 73 14 47 48 49 4a */
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xor [%ebx + $0x16171819], $0x48494a4b
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/* 81 b3 19 18 17 16 4b */
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/* 4a 49 48 */
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xor %ecx, $0x45464748 /* 81 f1 45 46 47 48 */
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xor [%eax], -$0x02 /* 83 30 fe */
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